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Alain Greiner was born in Paris in 1952. He got his PHD from University Denis Diderot (Paris 7) in 1982, after working six years at "Commissariat l'Energie Atomique" as a research engineer in nuclear physics. From 1982 to 1986 he was assistant professor in VLSI design at University Pierre et Marie Curie (Paris 6). He joined the BULL company in 1996, as a senior engineer, and was project leader for the VLSI design of the Basic Processing Unit of the DPS7000 computer, the most powerfull mainframe in this family. Since 1990, Alain Greiner has a permanent position as a professor at University Pierre et Marie Curie. He was director of the MASI Laboratory from 1994 to 1997. He is the project leader for the ALLIANCE CAD system. This public domain VLSI CAD system is distributed and used in more than 250 universities worlwide. This project won the Seymour Cray prize in 1994. Alain Greiner directed the MPC project, a parallel computer architecture based on the 1Gbit/s HSL serial link technology developped at UPMC. Alain Greiner is a co-founder of two start-up companies : Thachys Technologies was created in 1996 in order to make commercial exploitation of the HSL interconnexion technology (chips and macrocells). Avertec was created in 1998 in order to make commercial exploitation of several VLSI/CAD tools for verification of deep-submicronic design. He is presently head of the SOC department of the LIP6 Laboratory, and assistant director of the LIP6.

University of Paris VI, Pierre & Marie Curie,
Laboratoire LIP6-ASIM
4, Place Jussieu, 75252 Paris Cedex 05, France
Phone: 33-1-44 27 70 15
Fax: 33-1-44 27 72 80
Email: Alain.Greiner@lip6.fr


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Last modified on 08 November 2005