Example :
from stratus import *
class inst_fifo ( Model ) :
def Interface ( self ) :
self.ck = SignalIn ( "ck", 1 )
self.reset = SignalIn ( "reset", 1 )
self.r = SignalIn ( "r", 1 )
self.w = SignalIn ( "w", 1 )
self.rok = SignalInOut ( "rok", 1 )
self.wok = SignalInOut ( "wok", 1 )
self.sel = SignalIn ( "sel", 1 )
self.datain0 = SignalIn ( "datain0", 4 )
self.datain1 = SignalIn ( "datain1", 4 )
self.dataout = SignalOut ( "dataout", 4 )
self.vdd = VddIn ( "vdd" )
self.vss = VssIn ( "vss" )
def Netlist ( self ) :
Generate ( 'DpgenFifo', 'fifo_4_16'
, param = { 'nbit' : 4
, 'nword' : 16
, 'physical' : True
}
)
self.I = Inst ( 'fifo_4_16', 'inst'
, map = { 'ck' : self.ck
, 'reset' : self.reset
, 'r' : self.r
, 'w' : self.w
, 'rok' : self.rok
, 'wok' : self.wok
, 'sel' : self.sel
, 'datain0' : self.datain0
, 'datain1' : self.datain1
, 'dataout' : self.dataout
, 'vdd' : self.vdd
, 'vss' : self.vss
}
)
def Layout ( self ) :
Place ( self.I, NOSYM, Ref(0, 0) )