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Publications

See LIP6 - ASIM Publications

2009
  • "Hierarchical Sizing and Biasing of Analog Firm Intellectual Properties"
    Ramy Iskander, Marie-Minerve Louërat and Andreas Kaiser
    Poster at Design Automation and Test in Europe (DATE'09), University Booth, April 2009, Nice, France.

  • "Automatic Model Refinement of GmC Integrators for High-Level Simulation of Continuous-Time Sigma-Delta Modulators",
    M. Vasilevski, H. Aboushady and M.M. Louerat,
    IEEE International Symposium on Circuits & Systems, ISCAS'09, Taipei, Taiwan, May 2009.

  • "Simulation-Based Hierarchical Sizing and Biasing of Analog Firm IPs",
    Farakh Javid, Ramy Iskander and Marie-Minerve Louërat
    IEEE International Behavioral, Modeling and Simulation Conference (BMAS'09), September 2009, San Jose, California, pp.4"-48.

  • "Design and Analysis of Analog Firm IPs using Hierarchical Sizing and Biasing Methodology"
    Ramy Iskander, Marie-Minerve Louërat and Andreas Kaiser
    Poster, 39th European Solid-State Device Research Conference (ESSDERC'09), September 2009, Athens, Greece.

  • "A Q-Enhanced LC Bandpass Filter using CAIRO+",
    D. Belfort, N. Beilleau, H. Aboushady, M.M. Louerat and Y. Catunda,
    IEEE International Conference on Electronic Circuits and Systems, ICECS'09, Tunisia, December 2009.

    • 2008

  • "Automatic DC Operating Point Computation and Design Plan Generation for Analog IPs"
    Ramy Iskander, Marie-Minerve Louërat and Andreas Kaiser
    Analog Integrated Circuits and Signal Processing Journal, Vol. 56, Issue 1-2, pp. 93-105, August 2008.
    available on SpringerLink

  • "Automatic Synthesis of micro-Power and Compact Continuous Time Sigma-Delta for Probe Storage Device",
    J. Bonan, H. Aboushady, M.M. Louerat and C. Hagleitner,
    IEEE European Solid State Circuits Conference FRINGE, ESSCIRC-FRINGE'08, Edinburgh, Scottland, U.K., September 2008.

    • 2007
  • "Connaissance et Opimisation pour la Synthèse Analogique"
    Ramy Iskander, Dimitri Galayko, Marie-Minerve Louërat et Andreas Kaiser
    1er Colloque Nationale GDR SoC-SiP, Juin 2007, Paris, France.

  • "Knowledge-Aware Synthesis Using Hierarchical Graph-Based Sizing and Biasing"
    Ramy Iskander, Dimitri Galayko, Marie-Minerve Louërat and Andreas Kaiser
    50th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS'07), pp. 984-987, August 2007, Montréal,Québec .

  • "Détection et évaluation des tensions de décalage d'un circuit analogique"
    Ramy Iskander, Marie-Minerve Louërat and Andreas Kaiser
    8ème colloque sur le Traitement Analogique de l'Information, du Signal et ses Applications (TAISA'07), Octobre 2007, Lyon, France.

  • "Systematic Offset Detection and Evaluation Using Hierarchical Graph-Based Sizing and Biasing"
    Ramy Iskander, Marie-Minerve Louërat and Andreas Kaiser
    14th IEEE International Conference on Electronics, Circuits and Systems (ICECS'07), December 2007, Marrakech, Morocco.

  • "Computing Systematic Offsets in Amplifiers Using Hierarchical Graph-Based Sizing and Biasing"
    Ramy Iskander, Marie-Minerve Louërat and Andreas Kaiser
    Accepted in the 19th IEEE International Conference on MicroElectronics (ICM'07), December 2007, Cairo, Egypt.

    •  2006

  • "Hierarchical Graph-Based Sizing for Analog Cells Through Reference Transistors",
    Iskander Ramy, Louërat Marie-Minerve, Kaiser Andreas,
    Microelectronics and Electronics (PRIME'06),Otranto, Italy, June 2006, pp. 321-324, Winner of the Bronze Leaf Certificate.

  • "Dimensionnement automatique dun circuit analogique à l'aide des transistors de référence",
    Iskander Ramy, Louërat Marie-Minerve, Kaiser Andreas,
    Traitement Analogique de l'Information du Signal et ses Applications (TAISA'06), Strasbourg, France, Octobre 2006, pp. 89-92.

  • "Optimisation des éléments passifs d'un convertisseur sigma-delta temps continu",
    de Lamarre Laurent, Louërat Marie-Minerve, Kaiser Andreas,
    Traitement Analogique de l'Information du Signal et ses Applications (TAISA'06), Strasbourg, France, Octobre 2006, pp. 101-104.

  • "Optimizing Resistances and Capacitances of a Continuous-Time Sigma-Delta ADC",
    de Lamarre Laurent, Louërat Marie-Minerve, Kaiser Andreas,
    13th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2006), Nice, France, December 2006.

    • 2005
  • "Evaluation of Capacitor Ratios in Automated Accurate Common-Centroid Capacitor Arrays",
    Khalil DiaaEldin, Dessouky Mohamed, Bourguet Vincent, Rosset-Louërat Marie-Minerve, Cathelin Andreia, Ragai Hani,
    Proceedings of the 6th International Symposium on Quality Electronic Design (ISQED'05), San Jose, CA, USA, March 2005, pp. 143.


  • "A simple 3.8mW, 300 MHz, 4-bit flash analog-to-digital converter",
    de Lamarre Laurent, Rosset-Louërat Marie-Minerve, Kaiser Andreas,
    Microtechnologies for the New Millennium 2005 : VLSI Circuits and Systems II, Sevilla, Spain, may 2005.


  • "Automatic Biasing Point Extraction and Design Plan Generation for Analog IPs",
    Iskander Ramy, Rosset-Louërat Marie-Minerve, Kaiser Andreas,
    The 48th IEEE MidWest Symposium on Circuits And Systems (MWSCAS'05), Cincinnati, Ohio, USA, August 2005.


  • "Using Finite Impulse Response Feedback DACs to design Sigma-Delta modulators based on LC filters",
    N. Beilleau, H. Aboushady and M.M. Louerat,
    IEEE Midwest Symposium on Circuits and Systems, (MWSCAS'05), Cincinnati OH, USA, August 2005.


  • "Un convertisseur flash 4 bits à base de transistors MOS consommant 3,8mW à 300MHz",
    de Lamarre Laurent, Louërat Marie-Minerve, Kaiser Andreas,
    Colloque sur le Traitement Analogique de l'Information du Signal et ses Applications (TAISA'2005), Marseille, France, octobre 2005, pp. 57-60.

  • "Synthèse d'un IP amplificateur analogique CMOS avec CAIRO+",
    Iskander Ramy, de Lamarre Laurent, Nguyen Tuong Pierre, Louërat Marie-Minerve, Kaiser Andreas,
    6ème Colloque sur le Traitement Analogique de l'Information du Signal et ses Applications (TAISA'2005), Marseille, France, octobre 2005, pp. 69-72.

    •  2004
  • "Automatic Synthesis and Simulation of Continuous-Time Sigma Delta Modulators",
    Aboushady Hassan, de Lamarre Laurent, Beilleau Nicolas, Rosset-Louërat Marie-Minerve, Design Automation and Test in Europe (DATE'04), Paris, February 2004, pp. 674-675, Winner of the Best Interactive Presentation.

  • "Loop Delay Compensation in Bandpass Continuous-Time Modulators without Additional Feedback Coefficients",
    Aboushady Hassan, Rosset-Louërat Marie-Minerve,
    IEEE International Symposium on Circuits and Systems (ISCAS'04), Vancouver, Canada, May 2004.

  • "Managing the Shape Function of Analog Devices in a Slicing Tree Floorplan",
    Nguyen Tuong Pierre, Rosset-Louërat Marie-Minerve, Greiner Alain,
    Proceedings of the 11th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2004), Szczecin, Poland, June 2004, pp. 226-229.

  • "A Layout-Educated Analog Design Flow",
    Bourguet Vincent, de Lamarre Laurent, Rosset-Louërat Marie-Minerve,
    Proceedings of the 47th International Midwest Symposium on Circuits And Systems (MWSCAS'04), Hiroshima, Japan, July 2004.

  • "A Mixed Equation-based and Simulation-based Design Methodology for Continuous-Time Sigma-Delta Modulators",
    Aboushady Hassan, de Lamarre Laurent, Beilleau Nicolas, Rosset-Louërat Marie-Minerve,
    Midwest Symposium on Circuit And Systems (MWSCAS'04), Hiroshima, Japon, July 2004.

  • "Filtering Adjacent Channel Blockers using Signal-Transfer-Function of Continuous-Time Sigma-Delta Modulators",
    Beilleau Nicolas, Aboushady Hassan, Rosset-Louërat Marie-Minerve,
    MidWest Symposium of Circuits And System 2004 (MWSCAS'04), Hiroshima, Japon, juillet 2004.

  • "Compensated Layout for Automated Accurate Common-Centroid Capacitor Arrays",
    Kalil DiaaEldin, Dessouky Mohamed, Bourguet Vincent, Rosset-Louërat Marie-Minerve, Cathelin Andreia, Ragai Hani,
    The International Conference on Electrical Electronic and Computer Engineering 2004 (ICEEC'04), Le Caire, Egypte, September 2004, pp.481-484.

  • "Design Space Exploration for Analog IPs using CAIRO+",
    Iskander Ramy, de Lamarre Laurent, Kaiser Andreas, Rosset-Louërat Marie-Minerve,
    The International Conference on Electrical Electronic and Computer Engineering 2004 (ICEEC'04), Cairo, Egypt, September 2004, pp. 473-476.

  • "A Language to Design Generators of Analog Functions",
    Nguyen Tuong Pierre, Bourguet Vincent, de Lamarre Laurent, Rosset-Louërat Marie-Minerve, Greiner Alain,
    Forum on Specification & Design Languages (FDL'04), Lille, France, September 2004, pp. 30-31.

  • "Guidelines for Designing Smart and Reusable Analog IP Cores",
    Nguyen Tuong Pierre, Rosset-Louërat Marie-Minerve, Greiner Alain,
    Sophia Antipolis MicroElectronics Forum (SAME 2004), Sophia Antipolis, France, October 2004.

  • "Analog IC Design with a Library of Parameterized Device Generators",
    Bourguet Vincent, de Lamarre laurent, Rosset-Louërat Marie-Minerve,
    XIX Conference on Design of Circuits and Integrated Systems (DCIS 2004), Bordeaux, France, november 2004.

    •  2003
  • "Systematic Approach for Scaling Coefficients of Discrete-Time and Continuous-Time Sigma-Delta Modulators",
    Beilleau Nicolas, Aboushady Hassan, Rosset-Louërat Marie-Minerve,
    MidWest Symposium on Circuits And Systems (MWSCAS'03), Le Caire, Egypte, December 2003, Winner of the Third Place Award in the Student Paper Contest.

  • "A 3mW, 250 MSamples/sec, 4-bit Current Mode FLASH Analog-to-Digital Converter",
    Bonan José, Aboushady Hassan, Rosset-Louërat Marie-Minerve,
    MidWest Symposium on Circuits And Systems 2003 (MWSCAS'03), Le Caire, Egypte, December 2003.

    •  2002
  • "Use of MutiPhase Stability Intervals to handle Crosstalk with the Timing Analyzer hiTas",
    Avot Grégoire, Greiner Alain, Rosset-Louërat Marie-Minerve, Dioury Karim, Lester Anthony, Debreil Alain,
    Design Automation and Test in Europe Conference (DATE'2002), Paris, France, Mars 2002, User Forum Proc., pp. 112-116.

  • "Systematic Approach for Discrete-Time to Continuous-Time Transformation of Sigma-Delta Modulators ",
    Aboushady Hassan, Rosset-Louërat Marie-Minerve,
    IEEE International Symposium on Circuits and Systems (ISCAS'2002), Phoenix AZ, USA, May 2002.

  • "Composants analogiques déformables pour CAIRO+ ",
    Bourguet Vincent, Rosset-Louërat Marie-Minerve, Greiner Alain,
    Troisième colloque du GDR CAO de circuits et systèmes intégrés, Paris, France, Mai 2002, pp. 25-28.

  • "Placement Optimal d'Objets Déformables dans l'Environnement de Conception Analogique CAIRO+ ",
    Nguyen Tuong Pierre, Rosset-Louërat Marie-Minerve, Greiner Alain,
    Troisième Colloque du GDR CAO de circuits et systèmes intégrés, Paris, France, Mai 2002, pp. 29-32.

  • "A 5mW, 100kHz Bandwidth, Current-Mode Continuous-Time Sigma-Delta Modulator with 84 dB Dynamic Range ",
    Aboushady Hassan, Montaudon Franck, Paillardet Frédéric, Rosset-Louërat Marie-Minerve,
    European Conference on Solid State Circuits Conference (ESSCIRC'2002), Florence, Italy, September 2002, pp. 283-286.

    •  2001
  • "Efficient Polyphase decomposition of Comb decimation filters in sigma-delta analog-to-digital converters ",
    Aboushady Hassan, Dumonteix Yannick, Rosset-Louërat Marie-Minerve, Mehrez Habib,
    IEEE transactions on Circuits and Systems II, October 2001, vol. 48, No 10.

  • "Analog Design for Reuse - Case Study : Very Low Voltage Delta-Sigma Modulators ",
    Dessouky Mohamed, Kaiser Andreas, Rosset-Louërat Marie-Minerve, Greiner Alain,
    Design Automation and Test in Europe Conference (DATE'2001), Munich, Allemagne, Mars 2001, pp. 353-360.

  • "Low-Power Design of Low-Voltage Current-Mode Integrators for Continuous-Time Sigma-Delta Modulators ",
    Aboushady Hassan, Rosset-Louërat Marie-Minerve,
    IEEE International Symposium on Circuits and Systems (ISCAS'2001), Sydney, Australia, May, 2001, pp. I-276 I-279.

  • "Models for delay estimation taking into account both cross-talk and wire resistance for timing analysis ",
    Avot Grégoire, Rosset-Louërat Marie-Minerve,
    Mixed Design of Integrated Circuits and Systems (MIXDES'2001), Zakopane, Poland, June 2001, pp. 377-382.

  • "Systematic Design of High-Linearity Current-Mode Integrators for Low-Power Continuous-Time Sigma-Delta Modulators ",
    Aboushady Hassan, Rosset-Louërat Marie-Minerve,
    IEEE International Conference on Electronic Circuits and Systems (ICECS'2001), Malta, September 2001.

  • "Switch Sizing for Very Low-Voltage Switched-Capacitor Circuits ",
    Dessouky Mohamed, Rosset-Louërat Marie-Minerve, Kaiser Andreas,
    IEEE Int. Conf. on Electronic Circuit and Systems (ICECS'2001), Malta, Septembre 2001, pp. 1549-1552.

    •  2000
  • "Layout-Oriented Synthesis of High Performance Analog Circuits ",
    Dessouky Mohamed, Rosset-Louërat Marie-Minerve, Porte Jacky,
    Design Automation and Test in Europe Conference (DATE'2000), Paris, France, Mars 2000, pp. 53-57.

  • "Hierarchical Static Timing Analysis at Bull with HiTas ",
    Dioury Karim, Lester Anthony, Debreil Alain, Avot Gregoire, Greiner Alain, Rosset-Louërat Marie-Minerve,
    Design Automation and Test in Europe Conference User Forum (DATE'2000), Paris, France, Mars 2000,  pp. 55-60, Winner of the User Forum Prize.

  • "A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits ",
    Dessouky Mohamed, Rosset-Louërat Marie-Minerve,
    1st International Symposium on Quality Electronic Design (ISQED 2000), San Jose, USA, March 2000.

  • "Efficient Polyphase Decomposition of Comb Decimation Filters in Sigma-Delta Analog-to-Digital Converters ",
    Aboushady Hassan, Dumonteix Yannick, Rosset-Louërat Marie-Minerve, Mehrez Habib,
    IEEE Midwest Symposium on Circuits and Systems (MWSCAS 2000), Lansing MI, USA, August 2000, Winner of the Second Place Award in the Student Paper Contest.

  • "Low-power Comb Decimation Filter Using Polyphase Decomposition For Mono-bit Sigma-Delta Analog-to-Digital Converters ",
    Dumonteix Yannick, Aboushady Hassan, Mehrez Habib, Rosset-Louërat Marie-Minerve,
    International Conference On Signal Processing Applications and Technologies (ICSPAT 2000), Dallas, Texas, USA, October 2000, Best Paper Nomination.

    • 1999
  • "Hierarchical Static Timing Analysis for CMOS ULSI Circuits ",
    Dioury Karim, Greiner Alain, Rosset-Louërat Marie-Minerve,
    International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU'99), Monterey, CA, USA, March 1999, pp. 65-70.

  • "TANIS : Un outil pour la synthèse de circuits CMOS analogiques ",
    Dessouky Mohamed, Porte Jacky, Rosset-Louërat Marie-Minerve,
    Colloque CAO de Circuits Intégrés et Systèmes, GDR 732, France, Aix-en-Provence, Mai 1999, pp 186-189.

  • "Influence et prise en compte des capacités de diaphonies dans la conception d'outils d'analyse temporelle pour les technologies profondément submicroniques ",
    Avot Grégoire, Rosset-Louërat Marie-Minerve,
    Colloque CAO de Circuits Intégrés et Systèmes, GDR 732, France, Aix-en-Provence, Mai 1999, pp. 232-235.

  • "Synthèse de circuits faible tension CMOS analogiques ",
    Dessouky Mohamed, Porte Jacky, Rosset-Louërat Marie-Minerve,
    2ème Journées Francophones d'études Faible Tension Faible Consommation (FTFC'99), Paris, France, Mai 1999, pp. 126-130.

  • "CAIRO : A hierarchical layout language for analog circuits ",
    Dessouky Mohamed, Greiner Alain, Rosset-Louërat Marie-Minerve,
    Mixed Design of Integrated Circuits and Systems (MIXDES'99), Krakow, Poland, Juin 1999, pp. 105-110.

    •  1998
  • "Synthèse de Circuits Analogiques CMOS ",
    Dessouky Mohamed, Porte Jacky, Greiner Alain, Rosset-Louërat Marie-Minerve,
    1ères Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM'98), Toulouse, France, Avril 1998, pp.15.

    •  1997
  • "Accurate static timing analysis for deep submicronic CMOS circuits ",
    Dioury Karim, Greiner Alain, Rosset-Louërat Marie-Minerve,
    IFIP International Conference on Very Large Scale Integration (VLSI'97), Gramado Brasil, August 1997, pp. 439-450.

  • "CAIRO : Un Langage pour le Layout Analogique Symbolique ",
    Dessouky Mohamed, Greiner Alain, Rosset-Louërat Marie-Minerve,
    1er Colloque du GDR CAO de Circuits Intégrés et Systèmes, Grenoble France, Janvier 1997, pp. 14-17.

  • "Analyse Temporelle des Circuits VLSI à Haute Densité d'Intégration Utilisant des Technologies Submicroniques ",
    Dioury Karim, Greiner Alain, Rosset-Louërat Marie-Minerve,
    1er Colloque du GDR CAO de Circuits Intégrés et Systèmes, Grenoble France, Janvier 1997, pp. 184-187.

    •  1996
  • "A System Level Teaching Environment for Designing the 32 bit DLX Microprocessor ",
    Bazargan-Sabet Pirouz, Dunoyer Julien, Greiner Alain, Rosset-Louërat Marie-Minerve,
    1st European Workshop on Microelectronics Education (EWME'96), Grenoble, France, February 1996, pp. 197-200.

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    Last modified on 4 September 2006