I have created the Analog IC&Tools group within the CIAN Team in the SoC department of LIP6 laboratory previously known as CAIRO, and now integrated in the FOS EDA Coriolis project. This project is meant to be the cornerstone of the Free and Open Source Hardware (FOSHW) concept.
In LIP6, I am a member of 2 research axes:
Since 2010, I am a member of the AMS Working Group of Accellera Systems Initiative and a contributer to the standardization the AMS extensions of SystemC. In January 2020, the SystemC Analog/Mixed-signal (AMS) Working Group has released its user guide for those who would like to use SystemC AMS extensions for their system-level design and verification work. It is meant as an introductory guide for electronic system-level engineers and architects; it explains the modeling fundamentals and gives examples on how to start with AMS system-level design at higher levels of abstraction. For more information on SystemC AMS and to download the new user guide, visit the SystemC AMS Working Group page.
I am currently involved in a European project:
- Eureka/PENTA/HADES: Hierarchy-Aware and secure embedded test infrastructure for Dependability and performance Enhancement of integrated Systems (2017-2021)
and a French one:
- ANR/EDITSoC: Diagnostic Electrique des Systèmes-sur-Puce dédiés aux Applications IoT pour le Secteur Automobile (2018-2021)
I have contributed to several European research projects :
- Catrene/H-Inception: Heterogeneous System Virtual Prototyping (2012-2015)
- FP7/AUTOMICS: Pragmatic Solution for parasitic-immune design of electronics ICs for automotive (2012-2015)
- FP7/VERDI: Verification for Heterogeneous Reliable Design and Integration (2011-2014)
- Medea+/Beyond Dreams: Design refinement of Embedded Analog and Mixed-Signal System (2008-2011)
- NANO2012: Design of AMS IPs, specially : Sigma Delta A/D Converters (2009-2012)
As well as National projects :
- ANR/WASABI: Wireless systems And SystemC-AMS Basic Infrastructure (2008-2011)