Changes between Version 7 and Version 8 of partners


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Timestamp:
Jun 16, 2008, 3:56:32 PM (16 years ago)
Author:
fpecheux
Comment:

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  • partners

    v7 v8  
    2121*       evaluating the applicability on realistic application scenarios of distributed adaptive and recursive mapping strategies for parallel MPSoC architectures
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    23 = CEA-LETI participants =
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    25 '''Fabien CLERMIDY''' was born in Bourg-en-Bresse, France, in 1971. He received the Electronic Engineering Diploma from ENSIMEV in 1994 and his Ph.D. Degree in Microelectronics from the National Polytechnic Institute of Grenoble, France, in 1999.In 2000, he joined the CEA-LIST laboratory in Paris. He was involved in the design of an application specific parallel computer as designer. In 2003, he moved to the CEA-LETI in the Center for Innovation in micro & nanotechnology (MINATEC), Grenoble. From 2003 to 2006, he was the architect of the FAUST NoC structure and was in charge of chip verification. In 2006, he took the lead of the FAUST2 project for software and cognitive radio. He has published 11 papers in conferences. He holds 8 patents in the fields of fault-tolerant architectures, cryptography, NoC architectures, GALS structures and molecular electronics.
     26'''Fabien CLERMIDY''' was born in Bourg-en-Bresse, France, in 1971. He received the Electronic Engineering Diploma from ENSIMEV in 1994 and his Ph.D.
     27Degree in Microelectronics from the National Polytechnic Institute of Grenoble, France, in 1999.In 2000, he joined the CEA-LIST laboratory in Paris. He was involved in the design of an application specific parallel computer as designer. In 2003, he moved to the CEA-LETI in the Center for Innovation in micro & nanotechnology (MINATEC), Grenoble. From 2003 to 2006, he was the architect of the FAUST NoC structure and was in charge of chip verification. In 2006, he took the lead of the FAUST2 project for software and cognitive radio. He has published 11 papers in conferences. He holds 8 patents in the fields of fault-tolerant architectures, cryptography, NoC architectures, GALS structures and molecular electronics.
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    2729'''Edith BEIGNE''' was born in Lamastre, France, in 1975. She received the Electronic Engineering Diploma from the National Polytechnic Institute of Grenoble, France, in 1998. In 1998, she joined the CEA/LETI laboratory in the Center for Innovation in micro & nanotechnology (MINATEC), Grenoble. She was first involved in contactless RFID mixed signal systems. In 2001, she began the asynchronous logic design activity in cryptographic and contactless systems. As regards the development of the FAUST project, she designed a part of the asynchronous Network-On-Chip. Since 2006, she has been in charge of ALPIN project, a power aware GALS SoC implementing dynamic and static low power techniques based on an asynchronous NoC.
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    4547*       Extensive use of the embedded test processor in each subsystem to trigger a thorough test of the MP2SoC on a periodic scheme or in reaction to a failed CRC test in the running application
    4648*       Embed the remapping functionality onto the SoC. This implies the development of a static task placement algorithm, the modification of the routing parameters in the global routers and local interconnects, as well as an embedded application linker. With this approach, it is possible for the MP2SoC to self adapt the application to its downgraded architecture without any modification of the original firmware, considered as a collection and precompiled object files and link directives.
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    4853'''François PECHEUX''' is an Assistant Professor at the « University Pierre et Marie Curie », in Paris. He received  a PhD in Electronic Engineering and Computer Science in 1992, and since 2002 is member of the LIP6 Laboratory, in the « Embedded Systems » team. His main research activity focuses on the efficient modelling and simulation of very complex Massively Parallel MultiProcessor Systems on Chip. In particular, he participates in the development of a promising parallelizable simulation technique for Transaction Level Modeling with Timing (TLM/T) platforms (speedup x 20). He is also an active member of the SoCLib project, funded by ANR 2006, and works on power consumption and securized IPs in SoCs.
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    7378*       Evaluate the opportunity of distributed adaptive / recursive mapping strategies for massively parallel MP2SoC architectures. These strategies are based on statistical analysis of remapping actions that have been taken, and therefore help refining the future decisions to be made.
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     83'''Gilles SASSATELLI''' holds a full-time researcher position at CNRS and is responsible of the flexible parallel and reconfigurable architectures group. He obtained his Ph.D. in 2002 in Microelectronics and has been working at the Darmstadt University of Technology, Germany as an assistant professor. He has been involved in many different funded national and European projects and is the founder of the ReCoSoC European workshop focusing on reconfigurable technologies in a SoC context. His main research activity aims at bringing parallel reconfigurable computing devices to a new level of performance through exploring phy- and bio-inspired features for achieving self-organization of spatial computation elements.
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     85'''Lionel TORRES''' received his PhD degree in microelectronics from the University  of Montpellier II in 199.Between 1996 and 1997 he has worked at the ATMEL industry as a design engineer. After that he became assistant professor at the Polytech’Montpellier. He is currently a professor at the Université Montpellier II and a researcher at the LIRMM lab. He has scientific interest in microelectronic architectures for digital signal processing and dynamic reconfigurable architectures. He has publications in the main international
     86conferences in microelectronics design area. Lionel Torres also participate as program committee member in several international conferences and he is currently deputy director of the LIRMM Microelectronic department.
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     88'''Pascal BENOIT''' received a Master Degree in Microelectronics and Automated Systems from the University of Montpellier, France, in 2001. He obtained his PhD degree in Computer Engineering from the University of Montpellier in 2004. In November 2004, he joined the department of Electrical Engineering at the University of Karlsruhe in Germany where he worked as scientific assistant. Since September 2005, Dr. BENOIT has moved to the University of Montpellier in France as Associate Professor and Associate researcher of the Flexible Architectures Group of the LIRMM microelectronic research department.
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