[1] | 1 | /* |
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| 2 | * hal_context.c - implementation of Thread Context API for TSAR-MIPS32 |
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| 3 | * |
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| 4 | * Author Alain Greiner (2016) |
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| 5 | * |
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| 6 | * Copyright (c) UPMC Sorbonne Universites |
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| 7 | * |
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| 8 | * This file is part of ALMOS-MKH. |
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| 9 | * |
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| 10 | * ALMOS-MKH.is free software; you can redistribute it and/or modify it |
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| 11 | * under the terms of the GNU General Public License as published by |
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| 12 | * the Free Software Foundation; version 2.0 of the License. |
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| 13 | * |
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| 14 | * ALMOS-MKH.is distributed in the hope that it will be useful, but |
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| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 17 | * General Public License for more details. |
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| 18 | * |
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| 19 | * You should have received a copy of the GNU General Public License |
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| 20 | * along with ALMOS-MKH.; if not, write to the Free Software Foundation, |
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| 21 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 22 | */ |
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| 23 | |
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[457] | 24 | #include <hal_kernel_types.h> |
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[317] | 25 | #include <hal_switch.h> |
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[1] | 26 | #include <memcpy.h> |
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| 27 | #include <thread.h> |
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| 28 | #include <string.h> |
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| 29 | #include <process.h> |
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[8] | 30 | #include <printk.h> |
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[1] | 31 | #include <vmm.h> |
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| 32 | #include <core.h> |
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| 33 | #include <cluster.h> |
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| 34 | #include <hal_context.h> |
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[406] | 35 | #include <hal_kentry.h> |
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[1] | 36 | |
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[151] | 37 | ///////////////////////////////////////////////////////////////////////////////////////// |
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[408] | 38 | // Define various SR initialisation values for TSAR-MIPS32 |
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[151] | 39 | ///////////////////////////////////////////////////////////////////////////////////////// |
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| 40 | |
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[408] | 41 | #define SR_USR_MODE 0x0000FF13 |
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| 42 | #define SR_USR_MODE_FPU 0x2000FF13 |
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[432] | 43 | #define SR_SYS_MODE 0x0000FF01 |
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[151] | 44 | |
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| 45 | ///////////////////////////////////////////////////////////////////////////////////////// |
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[407] | 46 | // This structure defines the CPU context for TSAR MIPS32. |
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| 47 | // The following registers are saved/restored at each context switch: |
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| 48 | // - GPR : all, but (zero, k0, k1), plus (hi, lo) |
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| 49 | // - CP0 : c0_th , c0_sr , C0_epc |
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| 50 | // - CP2 : c2_ptpr , C2_mode |
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| 51 | // |
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[406] | 52 | // WARNING : check the two CONFIG_CPU_CTX_SIZE & CONFIG_FPU_CTX_SIZE configuration |
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| 53 | // parameterss when modifying this structure. |
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[151] | 54 | ///////////////////////////////////////////////////////////////////////////////////////// |
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| 55 | |
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| 56 | typedef struct hal_cpu_context_s |
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| 57 | { |
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[296] | 58 | uint32_t c0_epc; // slot 0 |
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| 59 | uint32_t at_01; // slot 1 |
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| 60 | uint32_t v0_02; // slot 2 |
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| 61 | uint32_t v1_03; // slot 3 |
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| 62 | uint32_t a0_04; // slot 4 |
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| 63 | uint32_t a1_05; // slot 5 |
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| 64 | uint32_t a2_06; // slot 6 |
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| 65 | uint32_t a3_07; // slot 7 |
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| 66 | |
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| 67 | uint32_t t0_08; // slot 8 |
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| 68 | uint32_t t1_09; // slot 9 |
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| 69 | uint32_t t2_10; // slot 10 |
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| 70 | uint32_t t3_11; // slot 11 |
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| 71 | uint32_t t4_12; // slot 12 |
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| 72 | uint32_t t5_13; // slot 13 |
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| 73 | uint32_t t6_14; // slot 14 |
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| 74 | uint32_t t7_15; // slot 15 |
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| 75 | |
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| 76 | uint32_t s0_16; // slot 16 |
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| 77 | uint32_t s1_17; // slot 17 |
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| 78 | uint32_t s2_18; // slot 18 |
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| 79 | uint32_t s3_19; // slot 19 |
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| 80 | uint32_t s4_20; // slot 20 |
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| 81 | uint32_t s5_21; // slot 21 |
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| 82 | uint32_t s6_22; // slot 22 |
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| 83 | uint32_t s7_23; // slot 23 |
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| 84 | |
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| 85 | uint32_t t8_24; // slot 24 |
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[406] | 86 | uint32_t t9_25; // slot 25 |
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[296] | 87 | uint32_t hi_26; // slot 26 |
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| 88 | uint32_t lo_27; // slot 27 |
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| 89 | uint32_t gp_28; // slot 28 |
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| 90 | uint32_t sp_29; // slot 29 |
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[407] | 91 | uint32_t s8_30; // slot 30 |
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[296] | 92 | uint32_t ra_31; // slot 31 |
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| 93 | |
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| 94 | uint32_t c2_ptpr; // slot 32 |
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| 95 | uint32_t c2_mode; // slot 33 |
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| 96 | |
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| 97 | uint32_t c0_sr; // slot 34 |
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| 98 | uint32_t c0_th; // slot 35 |
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[151] | 99 | } |
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| 100 | hal_cpu_context_t; |
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| 101 | |
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| 102 | ///////////////////////////////////////////////////////////////////////////////////////// |
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| 103 | // This structure defines the fpu_context for TSAR MIPS32. |
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| 104 | ///////////////////////////////////////////////////////////////////////////////////////// |
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| 105 | |
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| 106 | typedef struct hal_fpu_context_s |
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| 107 | { |
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| 108 | uint32_t fpu_regs[32]; |
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| 109 | } |
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| 110 | hal_fpu_context_t; |
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| 111 | |
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[296] | 112 | |
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| 113 | ///////////////////////////////////////////////////////////////////////////////////////// |
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[407] | 114 | // CPU context related functions |
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[296] | 115 | ///////////////////////////////////////////////////////////////////////////////////////// |
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| 116 | |
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[407] | 117 | |
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| 118 | ////////////////////////////////////////////////// |
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| 119 | error_t hal_cpu_context_alloc( thread_t * thread ) |
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[1] | 120 | { |
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[492] | 121 | assert( (sizeof(hal_cpu_context_t) <= CONFIG_CPU_CTX_SIZE) , |
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[407] | 122 | "illegal CPU context size" ); |
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[406] | 123 | |
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[1] | 124 | // allocate memory for cpu_context |
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[407] | 125 | kmem_req_t req; |
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[8] | 126 | req.type = KMEM_CPU_CTX; |
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[1] | 127 | req.flags = AF_KERNEL | AF_ZERO; |
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| 128 | |
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| 129 | hal_cpu_context_t * context = (hal_cpu_context_t *)kmem_alloc( &req ); |
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[407] | 130 | if( context == NULL ) return -1; |
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[1] | 131 | |
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[407] | 132 | // link to thread |
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| 133 | thread->cpu_context = (void *)context; |
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| 134 | return 0; |
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[1] | 135 | |
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[407] | 136 | } // end hal_cpu_context_alloc() |
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| 137 | |
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[457] | 138 | ///////////////////////////////////////////////// |
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| 139 | // The following context slots are initialised |
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[407] | 140 | // GPR : a0_04 / sp_29 / ra_31 |
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| 141 | // CP0 : c0_sr / c0_th / c0_epc |
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| 142 | // CP2 : c2_ptpr / c2_mode |
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[457] | 143 | ///////////////////////////////////////////////// |
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| 144 | void hal_cpu_context_init( thread_t * thread ) |
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[407] | 145 | { |
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[457] | 146 | hal_cpu_context_t * context = (hal_cpu_context_t *)thread->cpu_context; |
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[407] | 147 | |
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[492] | 148 | assert( (context != NULL ), "CPU context not allocated" ); |
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[407] | 149 | |
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| 150 | // initialisation depends on thread type |
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[1] | 151 | if( thread->type == THREAD_USER ) |
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| 152 | { |
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[407] | 153 | context->a0_04 = (uint32_t)thread->entry_args; |
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[625] | 154 | context->sp_29 = (uint32_t)thread->user_stack_vseg->max - 8; |
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[407] | 155 | context->ra_31 = (uint32_t)&hal_kentry_eret; |
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| 156 | context->c0_epc = (uint32_t)thread->entry_func; |
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| 157 | context->c0_sr = SR_USR_MODE; |
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| 158 | context->c0_th = (uint32_t)thread; |
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| 159 | context->c2_ptpr = (uint32_t)((thread->process->vmm.gpt.ppn) >> 1); |
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| 160 | context->c2_mode = 0xF; |
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[1] | 161 | } |
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[407] | 162 | else // kernel thread |
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[1] | 163 | { |
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[407] | 164 | context->a0_04 = (uint32_t)thread->entry_args; |
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| 165 | context->sp_29 = (uint32_t)thread->k_stack_base + (uint32_t)thread->k_stack_size - 8; |
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| 166 | context->ra_31 = (uint32_t)thread->entry_func; |
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| 167 | context->c0_sr = SR_SYS_MODE; |
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| 168 | context->c0_th = (uint32_t)thread; |
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| 169 | context->c2_ptpr = (uint32_t)((thread->process->vmm.gpt.ppn) >> 1); |
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| 170 | context->c2_mode = 0x3; |
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[1] | 171 | } |
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[457] | 172 | } // end hal_cpu_context_init() |
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[1] | 173 | |
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[408] | 174 | //////////////////////////////////////////// |
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| 175 | void hal_cpu_context_fork( xptr_t child_xp ) |
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| 176 | { |
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[625] | 177 | // get pointer on calling thread |
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| 178 | thread_t * this = CURRENT_THREAD; |
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| 179 | |
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| 180 | // allocate a local CPU context in parent kernel stack |
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[408] | 181 | hal_cpu_context_t context; |
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| 182 | |
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[625] | 183 | // get local parent thread cluster and local pointer |
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| 184 | cxy_t parent_cxy = local_cxy; |
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[408] | 185 | thread_t * parent_ptr = CURRENT_THREAD; |
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| 186 | |
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| 187 | // get remote child thread cluster and local pointer |
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| 188 | cxy_t child_cxy = GET_CXY( child_xp ); |
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[459] | 189 | thread_t * child_ptr = GET_PTR( child_xp ); |
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[408] | 190 | |
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[625] | 191 | // get local pointer on remote child cpu context |
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[408] | 192 | char * child_context_ptr = hal_remote_lpt( XPTR(child_cxy , &child_ptr->cpu_context) ); |
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| 193 | |
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| 194 | // get local pointer on remote child process |
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[625] | 195 | process_t * process = hal_remote_lpt( XPTR(child_cxy , &child_ptr->process) ); |
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[408] | 196 | |
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| 197 | // get ppn of remote child process page table |
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[625] | 198 | uint32_t pt_ppn = hal_remote_l32( XPTR(child_cxy , &process->vmm.gpt.ppn) ); |
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[408] | 199 | |
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[625] | 200 | // get local pointer on parent uzone from parent thread descriptor |
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| 201 | uint32_t * parent_uzone = parent_ptr->uzone_current; |
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| 202 | |
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| 203 | // compute local pointer on child uzone |
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| 204 | uint32_t * child_uzone = (uint32_t *)( (intptr_t)parent_uzone + |
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| 205 | (intptr_t)child_ptr - |
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| 206 | (intptr_t)parent_ptr ); |
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| 207 | |
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| 208 | // update the uzone pointer in child thread descriptor |
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| 209 | hal_remote_spt( XPTR( child_cxy , &child_ptr->uzone_current ) , child_uzone ); |
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| 210 | |
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| 211 | #if DEBUG_HAL_CONTEXT |
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| 212 | uint32_t cycle = (uint32_t)hal_get_cycles(); |
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| 213 | if( DEBUG_HAL_CONTEXT < cycle ) |
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| 214 | printk("\n[%s] thread[%x,%x] parent_uzone %x / child_uzone %x / cycle %d\n", |
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| 215 | __FUNCTION__, this->process->pid, this->trdid, parent_uzone, child_uzone, cycle ); |
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| 216 | #endif |
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| 217 | |
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| 218 | // copy parent kernel stack to child thread descriptor |
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| 219 | // (this includes the uzone, that is allocated in the kernel stack) |
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| 220 | char * parent_ksp = (char *)hal_get_sp(); |
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| 221 | char * child_ksp = (char *)((intptr_t)parent_ksp + |
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| 222 | (intptr_t)child_ptr - |
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| 223 | (intptr_t)parent_ptr ); |
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| 224 | |
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| 225 | uint32_t size = (uint32_t)parent_ptr + CONFIG_THREAD_DESC_SIZE - (uint32_t)parent_ksp; |
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| 226 | |
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| 227 | hal_remote_memcpy( XPTR( child_cxy , child_ksp ), |
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| 228 | XPTR( local_cxy , parent_ksp ), |
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| 229 | size ); |
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| 230 | |
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| 231 | #if DEBUG_HAL_CONTEXT |
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| 232 | cycle = (uint32_t)hal_get_cycles(); |
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| 233 | printk("\n[%s] thread[%x,%x] copied kstack from parent %x to child %x / cycle %d\n", |
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| 234 | __FUNCTION__, this->process->pid, this->trdid, parent_ptr, child_ptr, cycle ); |
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| 235 | #endif |
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| 236 | |
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| 237 | // patch the user stack pointer slot in the child uzone[UZ_SP] |
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| 238 | // because parent and child use the same offset to access the user stack, |
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| 239 | // but parent and child do not have the same user stack base address. |
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| 240 | uint32_t parent_us_base = parent_ptr->user_stack_vseg->min; |
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| 241 | vseg_t * child_us_vseg = hal_remote_lpt( XPTR( child_cxy , &child_ptr->user_stack_vseg ) ); |
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| 242 | uint32_t child_us_base = hal_remote_l32( XPTR( child_cxy , &child_us_vseg->min ) ); |
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| 243 | uint32_t parent_usp = parent_uzone[UZ_SP]; |
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| 244 | uint32_t child_usp = parent_usp + child_us_base - parent_us_base; |
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| 245 | |
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| 246 | hal_remote_s32( XPTR( child_cxy , &child_uzone[UZ_SP] ) , child_usp ); |
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| 247 | |
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| 248 | #if DEBUG_HAL_CONTEXT |
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| 249 | cycle = (uint32_t)hal_get_cycles(); |
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| 250 | printk("\n[%s] thread[%x,%x] parent_usp %x / child_usp %x / cycle %d\n", |
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| 251 | __FUNCTION__, this->process->pid, this->trdid, parent_usp, child_usp, cycle ); |
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| 252 | #endif |
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| 253 | |
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| 254 | // save current values of CPU registers to local CPU context |
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[408] | 255 | hal_do_cpu_save( &context ); |
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| 256 | |
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[625] | 257 | // From this point, both parent and child can execute the following code, |
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| 258 | // but child thread will only execute it after being unblocked by parent thread. |
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| 259 | // They can be distinguished by the (CURRENT_THREAD,local_cxy) values, |
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| 260 | // and we must re-initialise the calling thread pointer from c0_th register |
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[408] | 261 | |
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[625] | 262 | this = CURRENT_THREAD; |
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[408] | 263 | |
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[625] | 264 | if( (this == parent_ptr) && (local_cxy == parent_cxy) ) // parent thread |
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[408] | 265 | { |
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[625] | 266 | // patch 4 slots in the local CPU context: the sp_29 / c0_th / C0_sr / c2_ptpr |
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| 267 | // slots are not identical in parent and child |
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| 268 | context.sp_29 = context.sp_29 + (intptr_t)child_ptr - (intptr_t)parent_ptr; |
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[408] | 269 | context.c0_th = (uint32_t)child_ptr; |
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| 270 | context.c0_sr = SR_SYS_MODE; |
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| 271 | context.c2_ptpr = pt_ppn >> 1; |
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| 272 | |
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[625] | 273 | // copy this patched context to remote child context |
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[408] | 274 | hal_remote_memcpy( XPTR( child_cxy , child_context_ptr ), |
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| 275 | XPTR( local_cxy , &context ) , |
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| 276 | sizeof( hal_cpu_context_t ) ); |
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[625] | 277 | #if DEBUG_HAL_CONTEXT |
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| 278 | cycle = (uint32_t)hal_get_cycles(); |
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| 279 | printk("\n[%s] thread[%x,%x] copied CPU context to child / cycle %d\n", |
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| 280 | __FUNCTION__, this->process->pid, this->trdid, cycle ); |
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| 281 | #endif |
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[408] | 282 | |
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[625] | 283 | // parent thread unblock child thread |
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| 284 | thread_unblock( XPTR( child_cxy , child_ptr ) , THREAD_BLOCKED_GLOBAL ); |
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| 285 | |
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| 286 | #if DEBUG_HAL_CONTEXT |
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| 287 | cycle = (uint32_t)hal_get_cycles(); |
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| 288 | printk("\n[%s] thread[%x,%x] unblocked child thread / cycle %d\n", |
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| 289 | __FUNCTION__, this->process->pid, this->trdid, cycle ); |
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| 290 | #endif |
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| 291 | |
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[408] | 292 | } |
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[625] | 293 | |
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[408] | 294 | } // end hal_cpu_context_fork() |
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| 295 | |
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[457] | 296 | ////////////////////////////////////////////// |
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| 297 | void hal_cpu_context_exec( thread_t * thread ) |
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| 298 | { |
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| 299 | // re_initialize CPU context |
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| 300 | hal_cpu_context_init( thread ); |
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| 301 | |
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[570] | 302 | // restore CPU registers ... and jump to user code |
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[457] | 303 | hal_do_cpu_restore( (hal_cpu_context_t *)thread->cpu_context ); |
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| 304 | |
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| 305 | } // end hal_cpu_context_exec() |
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| 306 | |
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[296] | 307 | ///////////////////////////////////////////////// |
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[408] | 308 | void hal_cpu_context_display( xptr_t thread_xp ) |
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[296] | 309 | { |
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[408] | 310 | hal_cpu_context_t * ctx; |
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[296] | 311 | |
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[408] | 312 | // get thread cluster and local pointer |
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| 313 | cxy_t cxy = GET_CXY( thread_xp ); |
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[459] | 314 | thread_t * ptr = GET_PTR( thread_xp ); |
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[408] | 315 | |
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| 316 | // get context pointer |
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| 317 | ctx = (hal_cpu_context_t *)hal_remote_lpt( XPTR( cxy , &ptr->cpu_context ) ); |
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| 318 | |
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| 319 | // get relevant context slots values |
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[570] | 320 | uint32_t sp_29 = hal_remote_l32( XPTR( cxy , &ctx->sp_29 ) ); |
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| 321 | uint32_t ra_31 = hal_remote_l32( XPTR( cxy , &ctx->ra_31 ) ); |
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| 322 | uint32_t c0_sr = hal_remote_l32( XPTR( cxy , &ctx->c0_sr ) ); |
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| 323 | uint32_t c0_epc = hal_remote_l32( XPTR( cxy , &ctx->c0_epc ) ); |
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| 324 | uint32_t c0_th = hal_remote_l32( XPTR( cxy , &ctx->c0_th ) ); |
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| 325 | uint32_t c2_ptpr = hal_remote_l32( XPTR( cxy , &ctx->c2_ptpr ) ); |
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| 326 | uint32_t c2_mode = hal_remote_l32( XPTR( cxy , &ctx->c2_mode ) ); |
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[408] | 327 | |
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[406] | 328 | printk("\n***** CPU context for thread %x in process %x / cycle %d\n" |
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[408] | 329 | " sp_29 = %X ra_31 = %X\n" |
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[296] | 330 | " c0_sr = %X c0_epc = %X c0_th = %X\n" |
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| 331 | " c2_ptpr = %X c2_mode = %X\n", |
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[432] | 332 | ptr, ptr->process->pid, (uint32_t)hal_get_cycles(), |
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[408] | 333 | sp_29 , ra_31, |
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| 334 | c0_sr , c0_epc , c0_th, |
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| 335 | c2_ptpr , c2_mode ); |
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[296] | 336 | |
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[407] | 337 | } // end hal_cpu_context_display() |
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[317] | 338 | |
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[1] | 339 | ///////////////////////////////////////////////// |
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| 340 | void hal_cpu_context_destroy( thread_t * thread ) |
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| 341 | { |
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[625] | 342 | kmem_req_t req; |
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[1] | 343 | |
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[625] | 344 | hal_cpu_context_t * ctx = thread->cpu_context; |
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[1] | 345 | |
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[625] | 346 | // release CPU context if required |
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| 347 | if( ctx != NULL ) |
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| 348 | { |
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| 349 | req.type = KMEM_CPU_CTX; |
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| 350 | req.ptr = ctx; |
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| 351 | kmem_free( &req ); |
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| 352 | } |
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| 353 | |
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[1] | 354 | } // end hal_cpu_context_destroy() |
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| 355 | |
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[317] | 356 | |
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[407] | 357 | |
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| 358 | |
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| 359 | |
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| 360 | ////////////////////////////////////////////////// |
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| 361 | error_t hal_fpu_context_alloc( thread_t * thread ) |
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[1] | 362 | { |
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[492] | 363 | assert( (sizeof(hal_fpu_context_t) <= CONFIG_FPU_CTX_SIZE) , |
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[407] | 364 | "illegal CPU context size" ); |
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[406] | 365 | |
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[407] | 366 | // allocate memory for fpu_context |
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| 367 | kmem_req_t req; |
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[8] | 368 | req.type = KMEM_FPU_CTX; |
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[1] | 369 | req.flags = AF_KERNEL | AF_ZERO; |
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| 370 | |
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| 371 | hal_fpu_context_t * context = (hal_fpu_context_t *)kmem_alloc( &req ); |
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[407] | 372 | if( context == NULL ) return -1; |
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[1] | 373 | |
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[407] | 374 | // link to thread |
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| 375 | thread->fpu_context = (void *)context; |
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[1] | 376 | return 0; |
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| 377 | |
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[407] | 378 | } // end hal_fpu_context_alloc() |
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| 379 | |
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[457] | 380 | ////////////////////////////////////////////// |
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| 381 | void hal_fpu_context_init( thread_t * thread ) |
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| 382 | { |
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| 383 | hal_fpu_context_t * context = thread->fpu_context; |
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| 384 | |
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[492] | 385 | assert( (context != NULL) , "fpu context not allocated" ); |
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[457] | 386 | |
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| 387 | memset( context , 0 , sizeof(hal_fpu_context_t) ); |
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| 388 | } |
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| 389 | |
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[407] | 390 | ////////////////////////////////////////// |
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| 391 | void hal_fpu_context_copy( thread_t * dst, |
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| 392 | thread_t * src ) |
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[1] | 393 | { |
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[492] | 394 | assert( (src != NULL) , "src thread pointer is NULL\n"); |
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| 395 | assert( (dst != NULL) , "dst thread pointer is NULL\n"); |
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[1] | 396 | |
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[407] | 397 | // get fpu context pointers |
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[1] | 398 | hal_fpu_context_t * src_context = src->fpu_context; |
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[407] | 399 | hal_fpu_context_t * dst_context = dst->fpu_context; |
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[1] | 400 | |
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| 401 | // copy CPU context from src to dst |
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| 402 | memcpy( dst_context , src_context , sizeof(hal_fpu_context_t) ); |
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| 403 | |
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| 404 | } // end hal_fpu_context_copy() |
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| 405 | |
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| 406 | ///////////////////////////////////////////////// |
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| 407 | void hal_fpu_context_destroy( thread_t * thread ) |
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| 408 | { |
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| 409 | kmem_req_t req; |
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| 410 | |
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[625] | 411 | hal_fpu_context_t * context = thread->fpu_context; |
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[1] | 412 | |
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[625] | 413 | // release FPU context if required |
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| 414 | if( context != NULL ) |
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| 415 | { |
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| 416 | req.type = KMEM_FPU_CTX; |
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| 417 | req.ptr = context; |
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| 418 | kmem_free( &req ); |
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| 419 | } |
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| 420 | |
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[1] | 421 | } // end hal_fpu_context_destroy() |
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| 422 | |
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| 423 | ////////////////////////////////////////////// |
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[408] | 424 | void hal_fpu_context_save( xptr_t thread_xp ) |
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[1] | 425 | { |
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[408] | 426 | // allocate a local FPU context in kernel stack |
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[459] | 427 | hal_fpu_context_t src_context; |
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[1] | 428 | |
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[408] | 429 | // get remote child cluster and local pointer |
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| 430 | cxy_t thread_cxy = GET_CXY( thread_xp ); |
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[459] | 431 | thread_t * thread_ptr = GET_PTR( thread_xp ); |
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[408] | 432 | |
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[1] | 433 | asm volatile( |
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| 434 | ".set noreorder \n" |
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| 435 | "swc1 $f0, 0*4(%0) \n" |
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| 436 | "swc1 $f1, 1*4(%0) \n" |
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| 437 | "swc1 $f2, 2*4(%0) \n" |
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| 438 | "swc1 $f3, 3*4(%0) \n" |
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| 439 | "swc1 $f4, 4*4(%0) \n" |
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| 440 | "swc1 $f5, 5*4(%0) \n" |
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| 441 | "swc1 $f6, 6*4(%0) \n" |
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| 442 | "swc1 $f7, 7*4(%0) \n" |
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| 443 | "swc1 $f8, 8*4(%0) \n" |
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| 444 | "swc1 $f9, 9*4(%0) \n" |
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| 445 | "swc1 $f10, 10*4(%0) \n" |
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| 446 | "swc1 $f11, 11*4(%0) \n" |
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| 447 | "swc1 $f12, 12*4(%0) \n" |
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| 448 | "swc1 $f13, 13*4(%0) \n" |
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| 449 | "swc1 $f14, 14*4(%0) \n" |
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| 450 | "swc1 $f15, 15*4(%0) \n" |
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| 451 | "swc1 $f16, 16*4(%0) \n" |
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| 452 | "swc1 $f17, 17*4(%0) \n" |
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| 453 | "swc1 $f18, 18*4(%0) \n" |
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| 454 | "swc1 $f19, 19*4(%0) \n" |
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| 455 | "swc1 $f20, 20*4(%0) \n" |
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| 456 | "swc1 $f21, 21*4(%0) \n" |
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| 457 | "swc1 $f22, 22*4(%0) \n" |
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| 458 | "swc1 $f23, 23*4(%0) \n" |
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| 459 | "swc1 $f24, 24*4(%0) \n" |
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| 460 | "swc1 $f25, 25*4(%0) \n" |
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| 461 | "swc1 $f26, 26*4(%0) \n" |
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| 462 | "swc1 $f27, 27*4(%0) \n" |
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| 463 | "swc1 $f28, 28*4(%0) \n" |
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| 464 | "swc1 $f29, 29*4(%0) \n" |
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| 465 | "swc1 $f30, 30*4(%0) \n" |
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| 466 | "swc1 $f31, 31*4(%0) \n" |
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| 467 | ".set reorder \n" |
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[459] | 468 | : : "r"(&src_context) ); |
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[1] | 469 | |
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[459] | 470 | // get local pointer on target thread FPU context |
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| 471 | void * dst_context = hal_remote_lpt( XPTR( thread_cxy , &thread_ptr->fpu_context ) ); |
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| 472 | |
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[408] | 473 | // copy local context to remote child context) |
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[459] | 474 | hal_remote_memcpy( XPTR( thread_cxy , dst_context ), |
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| 475 | XPTR( local_cxy , &src_context ), |
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[408] | 476 | sizeof( hal_fpu_context_t ) ); |
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[1] | 477 | |
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[408] | 478 | } // end hal_fpu_context_save() |
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| 479 | |
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[1] | 480 | ///////////////////////////////////////////////// |
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| 481 | void hal_fpu_context_restore( thread_t * thread ) |
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| 482 | { |
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[459] | 483 | // get pointer on FPU context and cast to uint32_t |
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[1] | 484 | uint32_t ctx = (uint32_t)thread->fpu_context; |
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| 485 | |
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| 486 | asm volatile( |
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| 487 | ".set noreorder \n" |
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| 488 | "lwc1 $f0, 0*4(%0) \n" |
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| 489 | "lwc1 $f1, 1*4(%0) \n" |
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| 490 | "lwc1 $f2, 2*4(%0) \n" |
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| 491 | "lwc1 $f3, 3*4(%0) \n" |
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| 492 | "lwc1 $f4, 4*4(%0) \n" |
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| 493 | "lwc1 $f5, 5*4(%0) \n" |
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| 494 | "lwc1 $f6, 6*4(%0) \n" |
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| 495 | "lwc1 $f7, 7*4(%0) \n" |
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| 496 | "lwc1 $f8, 8*4(%0) \n" |
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| 497 | "lwc1 $f9, 9*4(%0) \n" |
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| 498 | "lwc1 $f10, 10*4(%0) \n" |
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| 499 | "lwc1 $f11, 11*4(%0) \n" |
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| 500 | "lwc1 $f12, 12*4(%0) \n" |
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| 501 | "lwc1 $f13, 13*4(%0) \n" |
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| 502 | "lwc1 $f14, 14*4(%0) \n" |
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| 503 | "lwc1 $f15, 15*4(%0) \n" |
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| 504 | "lwc1 $f16, 16*4(%0) \n" |
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| 505 | "lwc1 $f17, 17*4(%0) \n" |
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| 506 | "lwc1 $f18, 18*4(%0) \n" |
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| 507 | "lwc1 $f19, 19*4(%0) \n" |
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| 508 | "lwc1 $f20, 20*4(%0) \n" |
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| 509 | "lwc1 $f21, 21*4(%0) \n" |
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| 510 | "lwc1 $f22, 22*4(%0) \n" |
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| 511 | "lwc1 $f23, 23*4(%0) \n" |
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| 512 | "lwc1 $f24, 24*4(%0) \n" |
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| 513 | "lwc1 $f25, 25*4(%0) \n" |
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| 514 | "lwc1 $f26, 26*4(%0) \n" |
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| 515 | "lwc1 $f27, 27*4(%0) \n" |
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| 516 | "lwc1 $f28, 28*4(%0) \n" |
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| 517 | "lwc1 $f29, 29*4(%0) \n" |
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| 518 | "lwc1 $f30, 30*4(%0) \n" |
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| 519 | "lwc1 $f31, 31*4(%0) \n" |
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| 520 | ".set reorder \n" |
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| 521 | : : "r"(ctx) ); |
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| 522 | |
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| 523 | } // end hal_cpu_context_restore() |
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| 524 | |
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| 525 | |
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