source: trunk/hal/tsar_mips32/core/hal_context.c @ 647

Last change on this file since 647 was 647, checked in by alain, 4 years ago

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[1]1/*
2 * hal_context.c - implementation of Thread Context API for TSAR-MIPS32
3 *
[635]4 * Author  Alain Greiner    (2016,2017,2018,2019)
[1]5 *
6 * Copyright (c)  UPMC Sorbonne Universites
7 *
8 * This file is part of ALMOS-MKH.
9 *
10 * ALMOS-MKH.is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2.0 of the License.
13 *
14 * ALMOS-MKH.is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with ALMOS-MKH.; if not, write to the Free Software Foundation,
21 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
[457]24#include <hal_kernel_types.h>
[317]25#include <hal_switch.h>
[1]26#include <memcpy.h>
27#include <thread.h>
28#include <string.h>
29#include <process.h>
[8]30#include <printk.h>
[1]31#include <vmm.h>
[635]32#include <bits.h>
[1]33#include <core.h>
34#include <cluster.h>
35#include <hal_context.h>
[406]36#include <hal_kentry.h>
[1]37
[151]38/////////////////////////////////////////////////////////////////////////////////////////
[635]39//       Define various SR initialisation values for the TSAR-MIPS32 architecture.
[151]40/////////////////////////////////////////////////////////////////////////////////////////
41
[408]42#define SR_USR_MODE       0x0000FF13
43#define SR_USR_MODE_FPU   0x2000FF13
[432]44#define SR_SYS_MODE       0x0000FF01
[151]45
46/////////////////////////////////////////////////////////////////////////////////////////
[635]47// This structure defines the CPU context for the TSAR-MIPS32 architecture.
[407]48// The following registers are saved/restored at each context switch:
49// - GPR : all, but (zero, k0, k1), plus (hi, lo)
50// - CP0 : c0_th , c0_sr , C0_epc
51// - CP2 : c2_ptpr , C2_mode
52//
[406]53// WARNING : check the two CONFIG_CPU_CTX_SIZE & CONFIG_FPU_CTX_SIZE configuration
[635]54//           parameters when modifying this structure.
[151]55/////////////////////////////////////////////////////////////////////////////////////////
56
57typedef struct hal_cpu_context_s
58{
[296]59    uint32_t c0_epc;     // slot 0
60    uint32_t at_01;      // slot 1
61    uint32_t v0_02;      // slot 2
62    uint32_t v1_03;      // slot 3
63    uint32_t a0_04;      // slot 4
64    uint32_t a1_05;      // slot 5
65    uint32_t a2_06;      // slot 6
66    uint32_t a3_07;      // slot 7
67
68    uint32_t t0_08;      // slot 8
69    uint32_t t1_09;      // slot 9
70    uint32_t t2_10;      // slot 10
71    uint32_t t3_11;      // slot 11
72    uint32_t t4_12;      // slot 12
73    uint32_t t5_13;      // slot 13
74    uint32_t t6_14;      // slot 14
75    uint32_t t7_15;      // slot 15
76
77        uint32_t s0_16;      // slot 16
78        uint32_t s1_17;      // slot 17
79        uint32_t s2_18;      // slot 18
80        uint32_t s3_19;      // slot 19
81        uint32_t s4_20;      // slot 20
82        uint32_t s5_21;      // slot 21
83        uint32_t s6_22;      // slot 22
84        uint32_t s7_23;      // slot 23
85
86    uint32_t t8_24;      // slot 24
[406]87    uint32_t t9_25;      // slot 25
[296]88    uint32_t hi_26;      // slot 26
89    uint32_t lo_27;      // slot 27
90    uint32_t gp_28;      // slot 28
91        uint32_t sp_29;      // slot 29
[407]92        uint32_t s8_30;      // slot 30
[296]93        uint32_t ra_31;      // slot 31
94
95        uint32_t c2_ptpr;    // slot 32
96        uint32_t c2_mode;    // slot 33
97
98        uint32_t c0_sr;      // slot 34
99        uint32_t c0_th;      // slot 35
[151]100} 
101hal_cpu_context_t;
102
103/////////////////////////////////////////////////////////////////////////////////////////
[635]104// This structure defines the fpu_context for the TSAR MIPS32 architecture.
[151]105/////////////////////////////////////////////////////////////////////////////////////////
106
107typedef struct hal_fpu_context_s
108{
109        uint32_t   fpu_regs[32];     
110}
111hal_fpu_context_t;
112
[296]113
114/////////////////////////////////////////////////////////////////////////////////////////
[407]115//        CPU context related functions
[296]116/////////////////////////////////////////////////////////////////////////////////////////
117
[407]118
119//////////////////////////////////////////////////
120error_t hal_cpu_context_alloc( thread_t * thread )
[1]121{
[492]122    assert( (sizeof(hal_cpu_context_t) <= CONFIG_CPU_CTX_SIZE) ,
[407]123    "illegal CPU context size" );
[406]124
[1]125    // allocate memory for cpu_context
[407]126    kmem_req_t  req;
[635]127    req.type   = KMEM_KCM;
128    req.order  = bits_log2( sizeof(hal_cpu_context_t) );
[1]129    req.flags  = AF_KERNEL | AF_ZERO;
130
[635]131    hal_cpu_context_t * context = kmem_alloc( &req );
132
[407]133    if( context == NULL ) return -1;
[1]134
[407]135    // link to thread
136    thread->cpu_context = (void *)context;
137    return 0;
[1]138
[407]139}   // end hal_cpu_context_alloc()
140
[457]141/////////////////////////////////////////////////
142// The following context slots are initialised
[407]143// GPR : a0_04 / sp_29 / ra_31
144// CP0 : c0_sr / c0_th / c0_epc
145// CP2 : c2_ptpr / c2_mode
[457]146/////////////////////////////////////////////////
147void hal_cpu_context_init( thread_t * thread )
[407]148{
[457]149    hal_cpu_context_t * context = (hal_cpu_context_t *)thread->cpu_context;
[407]150
[492]151    assert( (context != NULL ), "CPU context not allocated" );
[407]152
[640]153    // compute the PPN for the GPT PT1
154    ppn_t    gpt_pt1_ppn = ppm_base2ppn( XPTR( local_cxy , thread->process->vmm.gpt.ptr ) );
155
[407]156    // initialisation depends on thread type
[1]157    if( thread->type == THREAD_USER )
158    {
[407]159        context->a0_04   = (uint32_t)thread->entry_args;
[625]160        context->sp_29   = (uint32_t)thread->user_stack_vseg->max - 8;
[407]161        context->ra_31   = (uint32_t)&hal_kentry_eret;
162        context->c0_epc  = (uint32_t)thread->entry_func;
163        context->c0_sr   = SR_USR_MODE;
164            context->c0_th   = (uint32_t)thread; 
[640]165            context->c2_ptpr = (uint32_t)(gpt_pt1_ppn >> 1);
[407]166        context->c2_mode = 0xF;
[1]167    }
[407]168    else  // kernel thread
[1]169    {
[407]170        context->a0_04   = (uint32_t)thread->entry_args;
171        context->sp_29   = (uint32_t)thread->k_stack_base + (uint32_t)thread->k_stack_size - 8;
172        context->ra_31   = (uint32_t)thread->entry_func;
173        context->c0_sr   = SR_SYS_MODE;
174            context->c0_th   = (uint32_t)thread; 
[640]175            context->c2_ptpr = (uint32_t)(gpt_pt1_ppn >> 1);
[407]176        context->c2_mode = 0x3;
[1]177    }
[457]178}  // end hal_cpu_context_init()
[1]179
[408]180////////////////////////////////////////////
181void hal_cpu_context_fork( xptr_t child_xp )
182{
[635]183    cxy_t               parent_cxy;        // parent thread cluster
184    thread_t          * parent_ptr;        // local pointer on parent thread
185    hal_cpu_context_t * parent_context;    // local pointer on parent cpu_context
186    uint32_t          * parent_uzone;      // local_pointer on parent uzone (in kernel stack)
187    char              * parent_ksp;        // kernel stack pointer on parent kernel stack
188    uint32_t            parent_us_base;    // parent user stack base value
[625]189
[635]190    cxy_t               child_cxy;         // parent thread cluster
191    thread_t          * child_ptr;         // local pointer on child thread
192    hal_cpu_context_t * child_context;     // local pointer on child cpu_context
193    uint32_t          * child_uzone;       // local_pointer on child uzone (in kernel stack)
194    char              * child_ksp;         // kernel stack pointer on child kernel stack
195    uint32_t            child_us_base;     // child user stack base value
196
197    process_t         * child_process;     // local pointer on child processs
[640]198    void              * child_gpt_ptr;     // local pointer on child GPT PT1
199    uint32_t            child_gpt_ppn;     // PPN of child GPT PT1
[635]200    vseg_t            * child_us_vseg;     // local pointer on child user stack vseg
201   
[625]202    // allocate a local CPU context in parent kernel stack
[635]203    hal_cpu_context_t context;
[408]204
[635]205    // get (local) parent thread cluster and local pointer
206    parent_cxy = local_cxy;
207    parent_ptr = CURRENT_THREAD;
[408]208
[635]209    // get (remote) child thread cluster and local pointer
210    child_cxy = GET_CXY( child_xp );
211    child_ptr = GET_PTR( child_xp );
[408]212
[635]213    // get local pointer on (local) parent CPU context
214    parent_context = parent_ptr->cpu_context;
[408]215
[635]216    // get local pointer on (remote) child CPU context
217    child_context = hal_remote_lpt( XPTR(child_cxy , &child_ptr->cpu_context) );
218
[408]219    // get local pointer on remote child process
[635]220    child_process = hal_remote_lpt( XPTR(child_cxy , &child_ptr->process) );
[408]221
[640]222    // get base and ppn of remote child process GPT PT1
[647]223    child_gpt_ptr = hal_remote_lpt( XPTR(child_cxy , &child_process->vmm.gpt.ptr) );
[640]224    child_gpt_ppn = ppm_base2ppn( XPTR( child_cxy , child_gpt_ptr ) );   
[408]225
[635]226    // get local pointer on local parent uzone (in parent kernel stack)
227    parent_uzone = parent_ptr->uzone_current;
[625]228
[635]229    // compute local pointer on remote child uzone (in child kernel stack)
230    child_uzone  = (uint32_t *)( (intptr_t)parent_uzone +
231                                 (intptr_t)child_ptr    -
232                                 (intptr_t)parent_ptr  );
[625]233
234    // update the uzone pointer in child thread descriptor
235    hal_remote_spt( XPTR( child_cxy , &child_ptr->uzone_current ) , child_uzone );
236
237#if DEBUG_HAL_CONTEXT
238uint32_t cycle = (uint32_t)hal_get_cycles();
239if( DEBUG_HAL_CONTEXT < cycle )
240printk("\n[%s] thread[%x,%x] parent_uzone %x / child_uzone %x / cycle %d\n",
[635]241__FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_uzone, child_uzone, cycle );
[625]242#endif
243
[635]244    // get user stack base for parent thread
245    parent_us_base = parent_ptr->user_stack_vseg->min;
[625]246
[635]247    // get user stack base for child thread
248    child_us_vseg  = hal_remote_lpt( XPTR( child_cxy , &child_ptr->user_stack_vseg ) );
249    child_us_base  = hal_remote_l32( XPTR( child_cxy , &child_us_vseg->min ) );
[625]250
[635]251#if DEBUG_HAL_CONTEXT
252if( DEBUG_HAL_CONTEXT < cycle )
253printk("\n[%s] thread[%x,%x] parent_ustack_base %x / child_ustack_base %x\n",
254__FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_us_base, child_us_base );
255#endif
[625]256
[635]257    // get current value of kernel stack pointer in parent kernel stack
258    parent_ksp = (char *)hal_get_sp();
259
260    // compute value of kernel stack pointer in child kernel stack
261    child_ksp  = (char *)((intptr_t)parent_ksp +
262                          (intptr_t)child_ptr  - 
263                          (intptr_t)parent_ptr );
264
[625]265#if DEBUG_HAL_CONTEXT
[635]266if( DEBUG_HAL_CONTEXT < cycle )
267printk("\n[%s] thread[%x,%x] parent_ksp %x / child_ksp %x\n",
268__FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_ksp, child_ksp );
[625]269#endif
270
[635]271    // compute number of bytes to be copied, depending on current value of parent_ksp
272    uint32_t size = (uint32_t)parent_ptr + CONFIG_THREAD_DESC_SIZE - (uint32_t)parent_ksp;   
[625]273
[635]274    // copy parent kernel stack content to child thread descriptor
275    // (this includes the uzone, that is allocated in the kernel stack)
276    hal_remote_memcpy( XPTR( child_cxy , child_ksp ),
277                       XPTR( local_cxy , parent_ksp ),
278                       size );
[625]279
280#if DEBUG_HAL_CONTEXT
[635]281if( DEBUG_HAL_CONTEXT < cycle )
282printk("\n[%s] thread[%x,%x] copied kstack from parent (%x) to child (%x)\n",
283__FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_ptr, child_ptr );
[625]284#endif
285
[635]286    // save current values of CPU registers to local copy of CPU context
[408]287    hal_do_cpu_save( &context );
288
[635]289    // update  three slots in this local CPU context
290    context.sp_29   = (uint32_t)child_ksp;
291    context.c0_th   = (uint32_t)child_ptr;
[640]292    context.c2_ptpr = (uint32_t)child_gpt_ppn >> 1;
[635]293
294    // From this point, both parent and child execute the following code,
[625]295    // but child thread will only execute it after being unblocked by parent thread.
296    // They can be distinguished by the (CURRENT_THREAD,local_cxy) values,
297    // and we must re-initialise the calling thread pointer from c0_th register
[408]298
[635]299    thread_t * this = CURRENT_THREAD;
[408]300
[625]301    if( (this == parent_ptr) && (local_cxy == parent_cxy) )   // parent thread
[408]302    {
[635]303        // parent thread must update four slots in child uzone
304        // - UZ_TH   : parent and child have different threads descriptors
305        // - UZ_SP   : parent and child have different user stack base addresses.
306        // - UZ_PTPR : parent and child use different Generic Page Tables
[408]307
[635]308        // parent thread computes values for child thread
309        uint32_t child_sp    = parent_uzone[UZ_SP]  + child_us_base - parent_us_base;
310        uint32_t child_th    = (uint32_t)child_ptr;
[640]311        uint32_t child_ptpr  = (uint32_t)child_gpt_ppn >> 1;
[635]312
313#if DEBUG_HAL_CONTEXT
314if( DEBUG_HAL_CONTEXT < cycle )
315printk("\n[%s] thread[%x,%x] : parent_uz_sp %x / child_uz_sp %x\n",
316__FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid,
317parent_uzone[UZ_SP], child_sp );
318#endif
319
320        // parent thread updates the child uzone
321        hal_remote_s32( XPTR( child_cxy , &child_uzone[UZ_SP]   ) , child_sp );
322        hal_remote_s32( XPTR( child_cxy , &child_uzone[UZ_TH]   ) , child_th );
323        hal_remote_s32( XPTR( child_cxy , &child_uzone[UZ_PTPR] ) , child_ptpr );
324
325        // parent thread copies the local context to remote child context
326        hal_remote_memcpy( XPTR( child_cxy , child_context ),
[408]327                           XPTR( local_cxy  , &context ) , 
328                           sizeof( hal_cpu_context_t ) );
[625]329#if DEBUG_HAL_CONTEXT
[635]330if( DEBUG_HAL_CONTEXT < cycle )
331printk("\n[%s] thread[%x,%x] copied parent CPU context to child CPU context\n",
332__FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid );
[625]333#endif
[408]334
[635]335        // parent thread unblocks child thread
[625]336        thread_unblock( XPTR( child_cxy , child_ptr ) , THREAD_BLOCKED_GLOBAL );
337
338#if DEBUG_HAL_CONTEXT
339cycle = (uint32_t)hal_get_cycles();
[635]340trdid_t child_trdid = hal_remote_l32( XPTR( child_cxy , &child_ptr->trdid ) );
341pid_t   child_pid   = hal_remote_l32( XPTR( child_cxy , &child_process->pid ) );
342printk("\n[%s] thread[%x,%x] unblocked child thread[%x,%x] / cycle %d\n",
343__FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, child_pid, child_trdid, cycle );
[625]344#endif
345
[408]346    }
[625]347
[408]348}  // end hal_cpu_context_fork()
349
[457]350//////////////////////////////////////////////
351void hal_cpu_context_exec( thread_t * thread )
352{
353    // re_initialize CPU context
354    hal_cpu_context_init( thread );
355
[570]356    // restore CPU registers ... and jump to user code
[457]357    hal_do_cpu_restore( (hal_cpu_context_t *)thread->cpu_context );
358
359} // end hal_cpu_context_exec()
360
[296]361/////////////////////////////////////////////////
[408]362void hal_cpu_context_display( xptr_t  thread_xp )
[296]363{
[408]364    hal_cpu_context_t * ctx;
[296]365
[408]366    // get thread cluster and local pointer
367    cxy_t      cxy = GET_CXY( thread_xp );
[459]368    thread_t * ptr = GET_PTR( thread_xp );
[408]369
370    // get context pointer
371    ctx = (hal_cpu_context_t *)hal_remote_lpt( XPTR( cxy , &ptr->cpu_context ) );
372
373    // get relevant context slots values
[570]374    uint32_t sp_29   = hal_remote_l32( XPTR( cxy , &ctx->sp_29   ) );
375    uint32_t ra_31   = hal_remote_l32( XPTR( cxy , &ctx->ra_31   ) );
376    uint32_t c0_sr   = hal_remote_l32( XPTR( cxy , &ctx->c0_sr   ) );
377    uint32_t c0_epc  = hal_remote_l32( XPTR( cxy , &ctx->c0_epc  ) );
378    uint32_t c0_th   = hal_remote_l32( XPTR( cxy , &ctx->c0_th   ) );
379    uint32_t c2_ptpr = hal_remote_l32( XPTR( cxy , &ctx->c2_ptpr ) );
380    uint32_t c2_mode = hal_remote_l32( XPTR( cxy , &ctx->c2_mode ) );
[408]381   
[406]382    printk("\n***** CPU context for thread %x in process %x / cycle %d\n" 
[408]383           " sp_29   = %X    ra_31   = %X\n" 
[296]384           " c0_sr   = %X    c0_epc  = %X    c0_th = %X\n"
385           " c2_ptpr = %X    c2_mode = %X\n",
[432]386           ptr, ptr->process->pid, (uint32_t)hal_get_cycles(),
[408]387           sp_29   , ra_31,
388           c0_sr   , c0_epc  , c0_th,
389           c2_ptpr , c2_mode );
[296]390
[407]391}  // end hal_cpu_context_display()
[317]392
[1]393/////////////////////////////////////////////////
394void hal_cpu_context_destroy( thread_t * thread )
395{
[625]396    kmem_req_t          req;
[1]397
[625]398    hal_cpu_context_t * ctx = thread->cpu_context;
[1]399
[625]400    // release CPU context if required
401    if( ctx != NULL )
402    {   
[635]403        req.type = KMEM_KCM;
[625]404        req.ptr  = ctx;
405        kmem_free( &req );
406    }
407
[1]408}  // end hal_cpu_context_destroy()
409
[317]410
[407]411
412
413
414//////////////////////////////////////////////////
415error_t hal_fpu_context_alloc( thread_t * thread )
[1]416{
[492]417    assert( (sizeof(hal_fpu_context_t) <= CONFIG_FPU_CTX_SIZE) ,
[407]418    "illegal CPU context size" );
[406]419
[407]420    // allocate memory for fpu_context
421    kmem_req_t  req;
[635]422    req.type   = KMEM_KCM;
[1]423    req.flags  = AF_KERNEL | AF_ZERO;
[635]424    req.order  = bits_log2( sizeof(hal_fpu_context_t) );
[1]425
[635]426    hal_fpu_context_t * context = kmem_alloc( &req );
427
[407]428    if( context == NULL ) return -1;
[1]429
[407]430    // link to thread
431    thread->fpu_context = (void *)context;
[1]432    return 0;
433
[407]434}   // end hal_fpu_context_alloc()
435
[457]436//////////////////////////////////////////////
437void hal_fpu_context_init( thread_t * thread )
438{
439    hal_fpu_context_t * context = thread->fpu_context;
440
[492]441    assert( (context != NULL) , "fpu context not allocated" );
[457]442
443    memset( context , 0 , sizeof(hal_fpu_context_t) );
444}
445
[407]446//////////////////////////////////////////
447void hal_fpu_context_copy( thread_t * dst,
448                           thread_t * src )
[1]449{
[492]450    assert( (src != NULL) , "src thread pointer is NULL\n");
451    assert( (dst != NULL) , "dst thread pointer is NULL\n");
[1]452
[407]453    // get fpu context pointers
[1]454    hal_fpu_context_t * src_context = src->fpu_context;
[407]455    hal_fpu_context_t * dst_context = dst->fpu_context;
[1]456
457    // copy CPU context from src to dst
458    memcpy( dst_context , src_context , sizeof(hal_fpu_context_t) );
459
460}  // end hal_fpu_context_copy()
461
462/////////////////////////////////////////////////
463void hal_fpu_context_destroy( thread_t * thread )
464{
465    kmem_req_t  req;
466
[625]467    hal_fpu_context_t * context = thread->fpu_context;
[1]468
[625]469    // release FPU context if required
470    if( context != NULL )
471    {   
[635]472        req.type = KMEM_KCM;
[625]473        req.ptr  = context;
474        kmem_free( &req );
475    }
476
[1]477}  // end hal_fpu_context_destroy()
478
479//////////////////////////////////////////////
[408]480void hal_fpu_context_save( xptr_t  thread_xp )
[1]481{
[408]482    // allocate a local FPU context in kernel stack
[459]483    hal_fpu_context_t  src_context;
[1]484
[408]485    // get remote child cluster and local pointer
486    cxy_t      thread_cxy = GET_CXY( thread_xp );
[459]487    thread_t * thread_ptr = GET_PTR( thread_xp );
[408]488
[1]489    asm volatile(
490    ".set noreorder           \n"
491    "swc1    $f0,    0*4(%0)  \n"   
492    "swc1    $f1,    1*4(%0)  \n"   
493    "swc1    $f2,    2*4(%0)  \n"   
494    "swc1    $f3,    3*4(%0)  \n"   
495    "swc1    $f4,    4*4(%0)  \n"   
496    "swc1    $f5,    5*4(%0)  \n"   
497    "swc1    $f6,    6*4(%0)  \n"   
498    "swc1    $f7,    7*4(%0)  \n"   
499    "swc1    $f8,    8*4(%0)  \n"   
500    "swc1    $f9,    9*4(%0)  \n"   
501    "swc1    $f10,  10*4(%0)  \n"   
502    "swc1    $f11,  11*4(%0)  \n"   
503    "swc1    $f12,  12*4(%0)  \n"   
504    "swc1    $f13,  13*4(%0)  \n"   
505    "swc1    $f14,  14*4(%0)  \n"   
506    "swc1    $f15,  15*4(%0)  \n"   
507    "swc1    $f16,  16*4(%0)  \n"   
508    "swc1    $f17,  17*4(%0)  \n"   
509    "swc1    $f18,  18*4(%0)  \n"   
510    "swc1    $f19,  19*4(%0)  \n"   
511    "swc1    $f20,  20*4(%0)  \n"   
512    "swc1    $f21,  21*4(%0)  \n"   
513    "swc1    $f22,  22*4(%0)  \n"   
514    "swc1    $f23,  23*4(%0)  \n"   
515    "swc1    $f24,  24*4(%0)  \n"   
516    "swc1    $f25,  25*4(%0)  \n"   
517    "swc1    $f26,  26*4(%0)  \n"   
518    "swc1    $f27,  27*4(%0)  \n"   
519    "swc1    $f28,  28*4(%0)  \n"   
520    "swc1    $f29,  29*4(%0)  \n"   
521    "swc1    $f30,  30*4(%0)  \n"   
522    "swc1    $f31,  31*4(%0)  \n"   
523    ".set reorder             \n"
[459]524    : : "r"(&src_context) );
[1]525
[459]526    // get local pointer on target thread FPU context
527    void * dst_context = hal_remote_lpt( XPTR( thread_cxy , &thread_ptr->fpu_context ) );
528
[408]529    // copy local context to remote child context)
[459]530    hal_remote_memcpy( XPTR( thread_cxy , dst_context ),
531                       XPTR( local_cxy  , &src_context ), 
[408]532                       sizeof( hal_fpu_context_t ) );
[1]533
[408]534}  // end hal_fpu_context_save()
535
[1]536/////////////////////////////////////////////////
537void hal_fpu_context_restore( thread_t * thread )
538{
[459]539    // get pointer on FPU context and cast to uint32_t
[1]540    uint32_t ctx = (uint32_t)thread->fpu_context;
541
542    asm volatile(
543    ".set noreorder           \n"
544    "lwc1    $f0,    0*4(%0)  \n"   
545    "lwc1    $f1,    1*4(%0)  \n"   
546    "lwc1    $f2,    2*4(%0)  \n"   
547    "lwc1    $f3,    3*4(%0)  \n"   
548    "lwc1    $f4,    4*4(%0)  \n"   
549    "lwc1    $f5,    5*4(%0)  \n"   
550    "lwc1    $f6,    6*4(%0)  \n"   
551    "lwc1    $f7,    7*4(%0)  \n"   
552    "lwc1    $f8,    8*4(%0)  \n"   
553    "lwc1    $f9,    9*4(%0)  \n"   
554    "lwc1    $f10,  10*4(%0)  \n"   
555    "lwc1    $f11,  11*4(%0)  \n"   
556    "lwc1    $f12,  12*4(%0)  \n"   
557    "lwc1    $f13,  13*4(%0)  \n"   
558    "lwc1    $f14,  14*4(%0)  \n"   
559    "lwc1    $f15,  15*4(%0)  \n"   
560    "lwc1    $f16,  16*4(%0)  \n"   
561    "lwc1    $f17,  17*4(%0)  \n"   
562    "lwc1    $f18,  18*4(%0)  \n"   
563    "lwc1    $f19,  19*4(%0)  \n"   
564    "lwc1    $f20,  20*4(%0)  \n"   
565    "lwc1    $f21,  21*4(%0)  \n"   
566    "lwc1    $f22,  22*4(%0)  \n"   
567    "lwc1    $f23,  23*4(%0)  \n"   
568    "lwc1    $f24,  24*4(%0)  \n"   
569    "lwc1    $f25,  25*4(%0)  \n"   
570    "lwc1    $f26,  26*4(%0)  \n"   
571    "lwc1    $f27,  27*4(%0)  \n"   
572    "lwc1    $f28,  28*4(%0)  \n"   
573    "lwc1    $f29,  29*4(%0)  \n"   
574    "lwc1    $f30,  30*4(%0)  \n"   
575    "lwc1    $f31,  31*4(%0)  \n"   
576    ".set reorder             \n"
577    : : "r"(ctx) );
578
579} // end hal_cpu_context_restore()
580
581
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