[1] | 1 | /* |
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| 2 | * hal_context.c - implementation of Thread Context API for TSAR-MIPS32 |
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| 3 | * |
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[635] | 4 | * Author Alain Greiner (2016,2017,2018,2019) |
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[1] | 5 | * |
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| 6 | * Copyright (c) UPMC Sorbonne Universites |
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| 7 | * |
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| 8 | * This file is part of ALMOS-MKH. |
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| 9 | * |
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| 10 | * ALMOS-MKH.is free software; you can redistribute it and/or modify it |
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| 11 | * under the terms of the GNU General Public License as published by |
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| 12 | * the Free Software Foundation; version 2.0 of the License. |
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| 13 | * |
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| 14 | * ALMOS-MKH.is distributed in the hope that it will be useful, but |
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| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 17 | * General Public License for more details. |
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| 18 | * |
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| 19 | * You should have received a copy of the GNU General Public License |
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| 20 | * along with ALMOS-MKH.; if not, write to the Free Software Foundation, |
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| 21 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 22 | */ |
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| 23 | |
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[457] | 24 | #include <hal_kernel_types.h> |
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[317] | 25 | #include <hal_switch.h> |
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[1] | 26 | #include <memcpy.h> |
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| 27 | #include <thread.h> |
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| 28 | #include <string.h> |
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| 29 | #include <process.h> |
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[8] | 30 | #include <printk.h> |
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[1] | 31 | #include <vmm.h> |
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[635] | 32 | #include <bits.h> |
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[1] | 33 | #include <core.h> |
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| 34 | #include <cluster.h> |
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| 35 | #include <hal_context.h> |
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[406] | 36 | #include <hal_kentry.h> |
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[1] | 37 | |
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[151] | 38 | ///////////////////////////////////////////////////////////////////////////////////////// |
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[635] | 39 | // Define various SR initialisation values for the TSAR-MIPS32 architecture. |
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[151] | 40 | ///////////////////////////////////////////////////////////////////////////////////////// |
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| 41 | |
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[408] | 42 | #define SR_USR_MODE 0x0000FF13 |
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| 43 | #define SR_USR_MODE_FPU 0x2000FF13 |
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[432] | 44 | #define SR_SYS_MODE 0x0000FF01 |
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[151] | 45 | |
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| 46 | ///////////////////////////////////////////////////////////////////////////////////////// |
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[635] | 47 | // This structure defines the CPU context for the TSAR-MIPS32 architecture. |
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[407] | 48 | // The following registers are saved/restored at each context switch: |
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| 49 | // - GPR : all, but (zero, k0, k1), plus (hi, lo) |
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| 50 | // - CP0 : c0_th , c0_sr , C0_epc |
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| 51 | // - CP2 : c2_ptpr , C2_mode |
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| 52 | // |
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[406] | 53 | // WARNING : check the two CONFIG_CPU_CTX_SIZE & CONFIG_FPU_CTX_SIZE configuration |
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[635] | 54 | // parameters when modifying this structure. |
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[151] | 55 | ///////////////////////////////////////////////////////////////////////////////////////// |
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| 56 | |
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| 57 | typedef struct hal_cpu_context_s |
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| 58 | { |
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[296] | 59 | uint32_t c0_epc; // slot 0 |
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| 60 | uint32_t at_01; // slot 1 |
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| 61 | uint32_t v0_02; // slot 2 |
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| 62 | uint32_t v1_03; // slot 3 |
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| 63 | uint32_t a0_04; // slot 4 |
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| 64 | uint32_t a1_05; // slot 5 |
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| 65 | uint32_t a2_06; // slot 6 |
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| 66 | uint32_t a3_07; // slot 7 |
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| 67 | |
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| 68 | uint32_t t0_08; // slot 8 |
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| 69 | uint32_t t1_09; // slot 9 |
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| 70 | uint32_t t2_10; // slot 10 |
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| 71 | uint32_t t3_11; // slot 11 |
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| 72 | uint32_t t4_12; // slot 12 |
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| 73 | uint32_t t5_13; // slot 13 |
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| 74 | uint32_t t6_14; // slot 14 |
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| 75 | uint32_t t7_15; // slot 15 |
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| 76 | |
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| 77 | uint32_t s0_16; // slot 16 |
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| 78 | uint32_t s1_17; // slot 17 |
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| 79 | uint32_t s2_18; // slot 18 |
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| 80 | uint32_t s3_19; // slot 19 |
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| 81 | uint32_t s4_20; // slot 20 |
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| 82 | uint32_t s5_21; // slot 21 |
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| 83 | uint32_t s6_22; // slot 22 |
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| 84 | uint32_t s7_23; // slot 23 |
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| 85 | |
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| 86 | uint32_t t8_24; // slot 24 |
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[406] | 87 | uint32_t t9_25; // slot 25 |
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[296] | 88 | uint32_t hi_26; // slot 26 |
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| 89 | uint32_t lo_27; // slot 27 |
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| 90 | uint32_t gp_28; // slot 28 |
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| 91 | uint32_t sp_29; // slot 29 |
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[407] | 92 | uint32_t s8_30; // slot 30 |
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[296] | 93 | uint32_t ra_31; // slot 31 |
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| 94 | |
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| 95 | uint32_t c2_ptpr; // slot 32 |
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| 96 | uint32_t c2_mode; // slot 33 |
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| 97 | |
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| 98 | uint32_t c0_sr; // slot 34 |
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| 99 | uint32_t c0_th; // slot 35 |
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[151] | 100 | } |
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| 101 | hal_cpu_context_t; |
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| 102 | |
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| 103 | ///////////////////////////////////////////////////////////////////////////////////////// |
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[635] | 104 | // This structure defines the fpu_context for the TSAR MIPS32 architecture. |
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[151] | 105 | ///////////////////////////////////////////////////////////////////////////////////////// |
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| 106 | |
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| 107 | typedef struct hal_fpu_context_s |
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| 108 | { |
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| 109 | uint32_t fpu_regs[32]; |
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| 110 | } |
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| 111 | hal_fpu_context_t; |
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| 112 | |
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[296] | 113 | |
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| 114 | ///////////////////////////////////////////////////////////////////////////////////////// |
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[407] | 115 | // CPU context related functions |
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[296] | 116 | ///////////////////////////////////////////////////////////////////////////////////////// |
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| 117 | |
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[407] | 118 | |
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| 119 | ////////////////////////////////////////////////// |
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| 120 | error_t hal_cpu_context_alloc( thread_t * thread ) |
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[1] | 121 | { |
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[492] | 122 | assert( (sizeof(hal_cpu_context_t) <= CONFIG_CPU_CTX_SIZE) , |
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[407] | 123 | "illegal CPU context size" ); |
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[406] | 124 | |
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[1] | 125 | // allocate memory for cpu_context |
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[407] | 126 | kmem_req_t req; |
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[635] | 127 | req.type = KMEM_KCM; |
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| 128 | req.order = bits_log2( sizeof(hal_cpu_context_t) ); |
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[1] | 129 | req.flags = AF_KERNEL | AF_ZERO; |
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| 130 | |
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[635] | 131 | hal_cpu_context_t * context = kmem_alloc( &req ); |
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| 132 | |
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[407] | 133 | if( context == NULL ) return -1; |
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[1] | 134 | |
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[407] | 135 | // link to thread |
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| 136 | thread->cpu_context = (void *)context; |
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| 137 | return 0; |
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[1] | 138 | |
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[407] | 139 | } // end hal_cpu_context_alloc() |
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| 140 | |
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[457] | 141 | ///////////////////////////////////////////////// |
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| 142 | // The following context slots are initialised |
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[407] | 143 | // GPR : a0_04 / sp_29 / ra_31 |
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| 144 | // CP0 : c0_sr / c0_th / c0_epc |
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| 145 | // CP2 : c2_ptpr / c2_mode |
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[457] | 146 | ///////////////////////////////////////////////// |
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| 147 | void hal_cpu_context_init( thread_t * thread ) |
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[407] | 148 | { |
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[457] | 149 | hal_cpu_context_t * context = (hal_cpu_context_t *)thread->cpu_context; |
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[407] | 150 | |
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[492] | 151 | assert( (context != NULL ), "CPU context not allocated" ); |
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[407] | 152 | |
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[640] | 153 | // compute the PPN for the GPT PT1 |
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| 154 | ppn_t gpt_pt1_ppn = ppm_base2ppn( XPTR( local_cxy , thread->process->vmm.gpt.ptr ) ); |
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| 155 | |
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[407] | 156 | // initialisation depends on thread type |
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[1] | 157 | if( thread->type == THREAD_USER ) |
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| 158 | { |
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[407] | 159 | context->a0_04 = (uint32_t)thread->entry_args; |
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[625] | 160 | context->sp_29 = (uint32_t)thread->user_stack_vseg->max - 8; |
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[407] | 161 | context->ra_31 = (uint32_t)&hal_kentry_eret; |
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| 162 | context->c0_epc = (uint32_t)thread->entry_func; |
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| 163 | context->c0_sr = SR_USR_MODE; |
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| 164 | context->c0_th = (uint32_t)thread; |
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[640] | 165 | context->c2_ptpr = (uint32_t)(gpt_pt1_ppn >> 1); |
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[407] | 166 | context->c2_mode = 0xF; |
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[1] | 167 | } |
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[407] | 168 | else // kernel thread |
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[1] | 169 | { |
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[407] | 170 | context->a0_04 = (uint32_t)thread->entry_args; |
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| 171 | context->sp_29 = (uint32_t)thread->k_stack_base + (uint32_t)thread->k_stack_size - 8; |
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| 172 | context->ra_31 = (uint32_t)thread->entry_func; |
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| 173 | context->c0_sr = SR_SYS_MODE; |
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| 174 | context->c0_th = (uint32_t)thread; |
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[640] | 175 | context->c2_ptpr = (uint32_t)(gpt_pt1_ppn >> 1); |
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[407] | 176 | context->c2_mode = 0x3; |
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[1] | 177 | } |
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[457] | 178 | } // end hal_cpu_context_init() |
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[1] | 179 | |
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[408] | 180 | //////////////////////////////////////////// |
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| 181 | void hal_cpu_context_fork( xptr_t child_xp ) |
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| 182 | { |
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[635] | 183 | cxy_t parent_cxy; // parent thread cluster |
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| 184 | thread_t * parent_ptr; // local pointer on parent thread |
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| 185 | hal_cpu_context_t * parent_context; // local pointer on parent cpu_context |
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| 186 | uint32_t * parent_uzone; // local_pointer on parent uzone (in kernel stack) |
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| 187 | char * parent_ksp; // kernel stack pointer on parent kernel stack |
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| 188 | uint32_t parent_us_base; // parent user stack base value |
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[625] | 189 | |
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[635] | 190 | cxy_t child_cxy; // parent thread cluster |
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| 191 | thread_t * child_ptr; // local pointer on child thread |
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| 192 | hal_cpu_context_t * child_context; // local pointer on child cpu_context |
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| 193 | uint32_t * child_uzone; // local_pointer on child uzone (in kernel stack) |
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| 194 | char * child_ksp; // kernel stack pointer on child kernel stack |
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| 195 | uint32_t child_us_base; // child user stack base value |
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| 196 | |
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| 197 | process_t * child_process; // local pointer on child processs |
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[640] | 198 | void * child_gpt_ptr; // local pointer on child GPT PT1 |
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| 199 | uint32_t child_gpt_ppn; // PPN of child GPT PT1 |
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[635] | 200 | vseg_t * child_us_vseg; // local pointer on child user stack vseg |
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| 201 | |
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[625] | 202 | // allocate a local CPU context in parent kernel stack |
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[635] | 203 | hal_cpu_context_t context; |
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[408] | 204 | |
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[635] | 205 | // get (local) parent thread cluster and local pointer |
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| 206 | parent_cxy = local_cxy; |
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| 207 | parent_ptr = CURRENT_THREAD; |
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[408] | 208 | |
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[635] | 209 | // get (remote) child thread cluster and local pointer |
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| 210 | child_cxy = GET_CXY( child_xp ); |
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| 211 | child_ptr = GET_PTR( child_xp ); |
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[408] | 212 | |
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[635] | 213 | // get local pointer on (local) parent CPU context |
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| 214 | parent_context = parent_ptr->cpu_context; |
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[408] | 215 | |
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[635] | 216 | // get local pointer on (remote) child CPU context |
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| 217 | child_context = hal_remote_lpt( XPTR(child_cxy , &child_ptr->cpu_context) ); |
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| 218 | |
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[408] | 219 | // get local pointer on remote child process |
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[635] | 220 | child_process = hal_remote_lpt( XPTR(child_cxy , &child_ptr->process) ); |
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[408] | 221 | |
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[640] | 222 | // get base and ppn of remote child process GPT PT1 |
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[647] | 223 | child_gpt_ptr = hal_remote_lpt( XPTR(child_cxy , &child_process->vmm.gpt.ptr) ); |
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[640] | 224 | child_gpt_ppn = ppm_base2ppn( XPTR( child_cxy , child_gpt_ptr ) ); |
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[408] | 225 | |
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[635] | 226 | // get local pointer on local parent uzone (in parent kernel stack) |
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| 227 | parent_uzone = parent_ptr->uzone_current; |
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[625] | 228 | |
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[635] | 229 | // compute local pointer on remote child uzone (in child kernel stack) |
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| 230 | child_uzone = (uint32_t *)( (intptr_t)parent_uzone + |
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| 231 | (intptr_t)child_ptr - |
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| 232 | (intptr_t)parent_ptr ); |
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[625] | 233 | |
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| 234 | // update the uzone pointer in child thread descriptor |
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| 235 | hal_remote_spt( XPTR( child_cxy , &child_ptr->uzone_current ) , child_uzone ); |
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| 236 | |
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| 237 | #if DEBUG_HAL_CONTEXT |
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| 238 | uint32_t cycle = (uint32_t)hal_get_cycles(); |
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| 239 | if( DEBUG_HAL_CONTEXT < cycle ) |
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| 240 | printk("\n[%s] thread[%x,%x] parent_uzone %x / child_uzone %x / cycle %d\n", |
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[635] | 241 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_uzone, child_uzone, cycle ); |
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[625] | 242 | #endif |
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| 243 | |
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[635] | 244 | // get user stack base for parent thread |
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| 245 | parent_us_base = parent_ptr->user_stack_vseg->min; |
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[625] | 246 | |
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[635] | 247 | // get user stack base for child thread |
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| 248 | child_us_vseg = hal_remote_lpt( XPTR( child_cxy , &child_ptr->user_stack_vseg ) ); |
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| 249 | child_us_base = hal_remote_l32( XPTR( child_cxy , &child_us_vseg->min ) ); |
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[625] | 250 | |
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[635] | 251 | #if DEBUG_HAL_CONTEXT |
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| 252 | if( DEBUG_HAL_CONTEXT < cycle ) |
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| 253 | printk("\n[%s] thread[%x,%x] parent_ustack_base %x / child_ustack_base %x\n", |
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| 254 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_us_base, child_us_base ); |
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| 255 | #endif |
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[625] | 256 | |
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[635] | 257 | // get current value of kernel stack pointer in parent kernel stack |
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| 258 | parent_ksp = (char *)hal_get_sp(); |
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| 259 | |
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| 260 | // compute value of kernel stack pointer in child kernel stack |
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| 261 | child_ksp = (char *)((intptr_t)parent_ksp + |
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| 262 | (intptr_t)child_ptr - |
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| 263 | (intptr_t)parent_ptr ); |
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| 264 | |
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[625] | 265 | #if DEBUG_HAL_CONTEXT |
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[635] | 266 | if( DEBUG_HAL_CONTEXT < cycle ) |
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| 267 | printk("\n[%s] thread[%x,%x] parent_ksp %x / child_ksp %x\n", |
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| 268 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_ksp, child_ksp ); |
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[625] | 269 | #endif |
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| 270 | |
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[635] | 271 | // compute number of bytes to be copied, depending on current value of parent_ksp |
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| 272 | uint32_t size = (uint32_t)parent_ptr + CONFIG_THREAD_DESC_SIZE - (uint32_t)parent_ksp; |
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[625] | 273 | |
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[635] | 274 | // copy parent kernel stack content to child thread descriptor |
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| 275 | // (this includes the uzone, that is allocated in the kernel stack) |
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| 276 | hal_remote_memcpy( XPTR( child_cxy , child_ksp ), |
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| 277 | XPTR( local_cxy , parent_ksp ), |
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| 278 | size ); |
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[625] | 279 | |
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| 280 | #if DEBUG_HAL_CONTEXT |
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[635] | 281 | if( DEBUG_HAL_CONTEXT < cycle ) |
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| 282 | printk("\n[%s] thread[%x,%x] copied kstack from parent (%x) to child (%x)\n", |
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| 283 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_ptr, child_ptr ); |
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[625] | 284 | #endif |
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| 285 | |
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[635] | 286 | // save current values of CPU registers to local copy of CPU context |
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[408] | 287 | hal_do_cpu_save( &context ); |
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| 288 | |
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[635] | 289 | // update three slots in this local CPU context |
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| 290 | context.sp_29 = (uint32_t)child_ksp; |
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| 291 | context.c0_th = (uint32_t)child_ptr; |
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[640] | 292 | context.c2_ptpr = (uint32_t)child_gpt_ppn >> 1; |
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[635] | 293 | |
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| 294 | // From this point, both parent and child execute the following code, |
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[625] | 295 | // but child thread will only execute it after being unblocked by parent thread. |
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| 296 | // They can be distinguished by the (CURRENT_THREAD,local_cxy) values, |
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| 297 | // and we must re-initialise the calling thread pointer from c0_th register |
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[408] | 298 | |
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[635] | 299 | thread_t * this = CURRENT_THREAD; |
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[408] | 300 | |
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[625] | 301 | if( (this == parent_ptr) && (local_cxy == parent_cxy) ) // parent thread |
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[408] | 302 | { |
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[635] | 303 | // parent thread must update four slots in child uzone |
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| 304 | // - UZ_TH : parent and child have different threads descriptors |
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| 305 | // - UZ_SP : parent and child have different user stack base addresses. |
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| 306 | // - UZ_PTPR : parent and child use different Generic Page Tables |
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[408] | 307 | |
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[635] | 308 | // parent thread computes values for child thread |
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| 309 | uint32_t child_sp = parent_uzone[UZ_SP] + child_us_base - parent_us_base; |
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| 310 | uint32_t child_th = (uint32_t)child_ptr; |
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[640] | 311 | uint32_t child_ptpr = (uint32_t)child_gpt_ppn >> 1; |
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[635] | 312 | |
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| 313 | #if DEBUG_HAL_CONTEXT |
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| 314 | if( DEBUG_HAL_CONTEXT < cycle ) |
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| 315 | printk("\n[%s] thread[%x,%x] : parent_uz_sp %x / child_uz_sp %x\n", |
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| 316 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, |
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| 317 | parent_uzone[UZ_SP], child_sp ); |
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| 318 | #endif |
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| 319 | |
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| 320 | // parent thread updates the child uzone |
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| 321 | hal_remote_s32( XPTR( child_cxy , &child_uzone[UZ_SP] ) , child_sp ); |
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| 322 | hal_remote_s32( XPTR( child_cxy , &child_uzone[UZ_TH] ) , child_th ); |
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| 323 | hal_remote_s32( XPTR( child_cxy , &child_uzone[UZ_PTPR] ) , child_ptpr ); |
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| 324 | |
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| 325 | // parent thread copies the local context to remote child context |
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| 326 | hal_remote_memcpy( XPTR( child_cxy , child_context ), |
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[408] | 327 | XPTR( local_cxy , &context ) , |
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| 328 | sizeof( hal_cpu_context_t ) ); |
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[625] | 329 | #if DEBUG_HAL_CONTEXT |
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[635] | 330 | if( DEBUG_HAL_CONTEXT < cycle ) |
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| 331 | printk("\n[%s] thread[%x,%x] copied parent CPU context to child CPU context\n", |
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| 332 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid ); |
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[625] | 333 | #endif |
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[408] | 334 | |
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[635] | 335 | // parent thread unblocks child thread |
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[625] | 336 | thread_unblock( XPTR( child_cxy , child_ptr ) , THREAD_BLOCKED_GLOBAL ); |
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| 337 | |
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| 338 | #if DEBUG_HAL_CONTEXT |
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| 339 | cycle = (uint32_t)hal_get_cycles(); |
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[635] | 340 | trdid_t child_trdid = hal_remote_l32( XPTR( child_cxy , &child_ptr->trdid ) ); |
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| 341 | pid_t child_pid = hal_remote_l32( XPTR( child_cxy , &child_process->pid ) ); |
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| 342 | printk("\n[%s] thread[%x,%x] unblocked child thread[%x,%x] / cycle %d\n", |
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| 343 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, child_pid, child_trdid, cycle ); |
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[625] | 344 | #endif |
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| 345 | |
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[408] | 346 | } |
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[625] | 347 | |
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[408] | 348 | } // end hal_cpu_context_fork() |
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| 349 | |
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[457] | 350 | ////////////////////////////////////////////// |
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| 351 | void hal_cpu_context_exec( thread_t * thread ) |
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| 352 | { |
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| 353 | // re_initialize CPU context |
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| 354 | hal_cpu_context_init( thread ); |
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| 355 | |
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[570] | 356 | // restore CPU registers ... and jump to user code |
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[457] | 357 | hal_do_cpu_restore( (hal_cpu_context_t *)thread->cpu_context ); |
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| 358 | |
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| 359 | } // end hal_cpu_context_exec() |
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| 360 | |
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[296] | 361 | ///////////////////////////////////////////////// |
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[408] | 362 | void hal_cpu_context_display( xptr_t thread_xp ) |
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[296] | 363 | { |
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[408] | 364 | hal_cpu_context_t * ctx; |
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[296] | 365 | |
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[408] | 366 | // get thread cluster and local pointer |
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| 367 | cxy_t cxy = GET_CXY( thread_xp ); |
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[459] | 368 | thread_t * ptr = GET_PTR( thread_xp ); |
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[408] | 369 | |
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| 370 | // get context pointer |
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| 371 | ctx = (hal_cpu_context_t *)hal_remote_lpt( XPTR( cxy , &ptr->cpu_context ) ); |
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| 372 | |
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| 373 | // get relevant context slots values |
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[570] | 374 | uint32_t sp_29 = hal_remote_l32( XPTR( cxy , &ctx->sp_29 ) ); |
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| 375 | uint32_t ra_31 = hal_remote_l32( XPTR( cxy , &ctx->ra_31 ) ); |
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| 376 | uint32_t c0_sr = hal_remote_l32( XPTR( cxy , &ctx->c0_sr ) ); |
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| 377 | uint32_t c0_epc = hal_remote_l32( XPTR( cxy , &ctx->c0_epc ) ); |
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| 378 | uint32_t c0_th = hal_remote_l32( XPTR( cxy , &ctx->c0_th ) ); |
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| 379 | uint32_t c2_ptpr = hal_remote_l32( XPTR( cxy , &ctx->c2_ptpr ) ); |
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| 380 | uint32_t c2_mode = hal_remote_l32( XPTR( cxy , &ctx->c2_mode ) ); |
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[408] | 381 | |
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[406] | 382 | printk("\n***** CPU context for thread %x in process %x / cycle %d\n" |
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[408] | 383 | " sp_29 = %X ra_31 = %X\n" |
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[296] | 384 | " c0_sr = %X c0_epc = %X c0_th = %X\n" |
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| 385 | " c2_ptpr = %X c2_mode = %X\n", |
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[432] | 386 | ptr, ptr->process->pid, (uint32_t)hal_get_cycles(), |
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[408] | 387 | sp_29 , ra_31, |
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| 388 | c0_sr , c0_epc , c0_th, |
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| 389 | c2_ptpr , c2_mode ); |
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[296] | 390 | |
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[407] | 391 | } // end hal_cpu_context_display() |
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[317] | 392 | |
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[1] | 393 | ///////////////////////////////////////////////// |
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| 394 | void hal_cpu_context_destroy( thread_t * thread ) |
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| 395 | { |
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[625] | 396 | kmem_req_t req; |
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[1] | 397 | |
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[625] | 398 | hal_cpu_context_t * ctx = thread->cpu_context; |
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[1] | 399 | |
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[625] | 400 | // release CPU context if required |
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| 401 | if( ctx != NULL ) |
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| 402 | { |
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[635] | 403 | req.type = KMEM_KCM; |
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[625] | 404 | req.ptr = ctx; |
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| 405 | kmem_free( &req ); |
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| 406 | } |
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| 407 | |
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[1] | 408 | } // end hal_cpu_context_destroy() |
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| 409 | |
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[317] | 410 | |
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[407] | 411 | |
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| 412 | |
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| 413 | |
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| 414 | ////////////////////////////////////////////////// |
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| 415 | error_t hal_fpu_context_alloc( thread_t * thread ) |
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[1] | 416 | { |
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[492] | 417 | assert( (sizeof(hal_fpu_context_t) <= CONFIG_FPU_CTX_SIZE) , |
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[407] | 418 | "illegal CPU context size" ); |
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[406] | 419 | |
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[407] | 420 | // allocate memory for fpu_context |
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| 421 | kmem_req_t req; |
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[635] | 422 | req.type = KMEM_KCM; |
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[1] | 423 | req.flags = AF_KERNEL | AF_ZERO; |
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[635] | 424 | req.order = bits_log2( sizeof(hal_fpu_context_t) ); |
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[1] | 425 | |
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[635] | 426 | hal_fpu_context_t * context = kmem_alloc( &req ); |
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| 427 | |
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[407] | 428 | if( context == NULL ) return -1; |
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[1] | 429 | |
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[407] | 430 | // link to thread |
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| 431 | thread->fpu_context = (void *)context; |
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[1] | 432 | return 0; |
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| 433 | |
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[407] | 434 | } // end hal_fpu_context_alloc() |
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| 435 | |
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[457] | 436 | ////////////////////////////////////////////// |
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| 437 | void hal_fpu_context_init( thread_t * thread ) |
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| 438 | { |
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| 439 | hal_fpu_context_t * context = thread->fpu_context; |
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| 440 | |
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[492] | 441 | assert( (context != NULL) , "fpu context not allocated" ); |
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[457] | 442 | |
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| 443 | memset( context , 0 , sizeof(hal_fpu_context_t) ); |
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| 444 | } |
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| 445 | |
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[407] | 446 | ////////////////////////////////////////// |
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| 447 | void hal_fpu_context_copy( thread_t * dst, |
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| 448 | thread_t * src ) |
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[1] | 449 | { |
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[492] | 450 | assert( (src != NULL) , "src thread pointer is NULL\n"); |
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| 451 | assert( (dst != NULL) , "dst thread pointer is NULL\n"); |
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[1] | 452 | |
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[407] | 453 | // get fpu context pointers |
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[1] | 454 | hal_fpu_context_t * src_context = src->fpu_context; |
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[407] | 455 | hal_fpu_context_t * dst_context = dst->fpu_context; |
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[1] | 456 | |
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| 457 | // copy CPU context from src to dst |
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| 458 | memcpy( dst_context , src_context , sizeof(hal_fpu_context_t) ); |
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| 459 | |
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| 460 | } // end hal_fpu_context_copy() |
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| 461 | |
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| 462 | ///////////////////////////////////////////////// |
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| 463 | void hal_fpu_context_destroy( thread_t * thread ) |
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| 464 | { |
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| 465 | kmem_req_t req; |
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| 466 | |
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[625] | 467 | hal_fpu_context_t * context = thread->fpu_context; |
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[1] | 468 | |
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[625] | 469 | // release FPU context if required |
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| 470 | if( context != NULL ) |
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| 471 | { |
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[635] | 472 | req.type = KMEM_KCM; |
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[625] | 473 | req.ptr = context; |
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| 474 | kmem_free( &req ); |
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| 475 | } |
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| 476 | |
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[1] | 477 | } // end hal_fpu_context_destroy() |
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| 478 | |
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| 479 | ////////////////////////////////////////////// |
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[408] | 480 | void hal_fpu_context_save( xptr_t thread_xp ) |
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[1] | 481 | { |
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[408] | 482 | // allocate a local FPU context in kernel stack |
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[459] | 483 | hal_fpu_context_t src_context; |
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[1] | 484 | |
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[408] | 485 | // get remote child cluster and local pointer |
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| 486 | cxy_t thread_cxy = GET_CXY( thread_xp ); |
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[459] | 487 | thread_t * thread_ptr = GET_PTR( thread_xp ); |
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[408] | 488 | |
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[1] | 489 | asm volatile( |
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| 490 | ".set noreorder \n" |
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| 491 | "swc1 $f0, 0*4(%0) \n" |
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| 492 | "swc1 $f1, 1*4(%0) \n" |
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| 493 | "swc1 $f2, 2*4(%0) \n" |
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| 494 | "swc1 $f3, 3*4(%0) \n" |
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| 495 | "swc1 $f4, 4*4(%0) \n" |
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| 496 | "swc1 $f5, 5*4(%0) \n" |
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| 497 | "swc1 $f6, 6*4(%0) \n" |
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| 498 | "swc1 $f7, 7*4(%0) \n" |
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| 499 | "swc1 $f8, 8*4(%0) \n" |
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| 500 | "swc1 $f9, 9*4(%0) \n" |
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| 501 | "swc1 $f10, 10*4(%0) \n" |
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| 502 | "swc1 $f11, 11*4(%0) \n" |
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| 503 | "swc1 $f12, 12*4(%0) \n" |
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| 504 | "swc1 $f13, 13*4(%0) \n" |
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| 505 | "swc1 $f14, 14*4(%0) \n" |
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| 506 | "swc1 $f15, 15*4(%0) \n" |
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| 507 | "swc1 $f16, 16*4(%0) \n" |
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| 508 | "swc1 $f17, 17*4(%0) \n" |
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| 509 | "swc1 $f18, 18*4(%0) \n" |
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| 510 | "swc1 $f19, 19*4(%0) \n" |
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| 511 | "swc1 $f20, 20*4(%0) \n" |
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| 512 | "swc1 $f21, 21*4(%0) \n" |
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| 513 | "swc1 $f22, 22*4(%0) \n" |
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| 514 | "swc1 $f23, 23*4(%0) \n" |
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| 515 | "swc1 $f24, 24*4(%0) \n" |
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| 516 | "swc1 $f25, 25*4(%0) \n" |
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| 517 | "swc1 $f26, 26*4(%0) \n" |
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| 518 | "swc1 $f27, 27*4(%0) \n" |
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| 519 | "swc1 $f28, 28*4(%0) \n" |
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| 520 | "swc1 $f29, 29*4(%0) \n" |
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| 521 | "swc1 $f30, 30*4(%0) \n" |
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| 522 | "swc1 $f31, 31*4(%0) \n" |
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| 523 | ".set reorder \n" |
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[459] | 524 | : : "r"(&src_context) ); |
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[1] | 525 | |
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[459] | 526 | // get local pointer on target thread FPU context |
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| 527 | void * dst_context = hal_remote_lpt( XPTR( thread_cxy , &thread_ptr->fpu_context ) ); |
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| 528 | |
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[408] | 529 | // copy local context to remote child context) |
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[459] | 530 | hal_remote_memcpy( XPTR( thread_cxy , dst_context ), |
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| 531 | XPTR( local_cxy , &src_context ), |
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[408] | 532 | sizeof( hal_fpu_context_t ) ); |
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[1] | 533 | |
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[408] | 534 | } // end hal_fpu_context_save() |
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| 535 | |
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[1] | 536 | ///////////////////////////////////////////////// |
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| 537 | void hal_fpu_context_restore( thread_t * thread ) |
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| 538 | { |
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[459] | 539 | // get pointer on FPU context and cast to uint32_t |
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[1] | 540 | uint32_t ctx = (uint32_t)thread->fpu_context; |
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| 541 | |
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| 542 | asm volatile( |
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| 543 | ".set noreorder \n" |
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| 544 | "lwc1 $f0, 0*4(%0) \n" |
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| 545 | "lwc1 $f1, 1*4(%0) \n" |
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| 546 | "lwc1 $f2, 2*4(%0) \n" |
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| 547 | "lwc1 $f3, 3*4(%0) \n" |
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| 548 | "lwc1 $f4, 4*4(%0) \n" |
---|
| 549 | "lwc1 $f5, 5*4(%0) \n" |
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| 550 | "lwc1 $f6, 6*4(%0) \n" |
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| 551 | "lwc1 $f7, 7*4(%0) \n" |
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| 552 | "lwc1 $f8, 8*4(%0) \n" |
---|
| 553 | "lwc1 $f9, 9*4(%0) \n" |
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| 554 | "lwc1 $f10, 10*4(%0) \n" |
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| 555 | "lwc1 $f11, 11*4(%0) \n" |
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| 556 | "lwc1 $f12, 12*4(%0) \n" |
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| 557 | "lwc1 $f13, 13*4(%0) \n" |
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| 558 | "lwc1 $f14, 14*4(%0) \n" |
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| 559 | "lwc1 $f15, 15*4(%0) \n" |
---|
| 560 | "lwc1 $f16, 16*4(%0) \n" |
---|
| 561 | "lwc1 $f17, 17*4(%0) \n" |
---|
| 562 | "lwc1 $f18, 18*4(%0) \n" |
---|
| 563 | "lwc1 $f19, 19*4(%0) \n" |
---|
| 564 | "lwc1 $f20, 20*4(%0) \n" |
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| 565 | "lwc1 $f21, 21*4(%0) \n" |
---|
| 566 | "lwc1 $f22, 22*4(%0) \n" |
---|
| 567 | "lwc1 $f23, 23*4(%0) \n" |
---|
| 568 | "lwc1 $f24, 24*4(%0) \n" |
---|
| 569 | "lwc1 $f25, 25*4(%0) \n" |
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| 570 | "lwc1 $f26, 26*4(%0) \n" |
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| 571 | "lwc1 $f27, 27*4(%0) \n" |
---|
| 572 | "lwc1 $f28, 28*4(%0) \n" |
---|
| 573 | "lwc1 $f29, 29*4(%0) \n" |
---|
| 574 | "lwc1 $f30, 30*4(%0) \n" |
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| 575 | "lwc1 $f31, 31*4(%0) \n" |
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| 576 | ".set reorder \n" |
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| 577 | : : "r"(ctx) ); |
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| 578 | |
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| 579 | } // end hal_cpu_context_restore() |
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| 580 | |
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| 581 | |
---|