source: trunk/hal/tsar_mips32/core/hal_irqmask.c @ 632

Last change on this file since 632 was 632, checked in by alain, 3 years ago

This version replace the RPC by direct remote memory access
for physical pages allacation/release.
It is commited before being tested.

File size: 2.3 KB
Line 
1/*
2 * hal_irqmask.c - implementation of Generic IRQ Masking API for TSAR-MIPS32
3 *
4 * Author  Ghassan Almaless (2008,2009,2010,2011,2012)
5 *         Alain Greiner    (2016)
6 *
7 * Copyright (c) UPMC Sorbonne Universites
8 *
9 * This file is part of ALMOS-MKH..
10 *
11 * ALMOS-MKH. is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2.0 of the License.
14 *
15 * ALMOS-MKH. is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with ALMOS-MKH.; if not, write to the Free Software Foundation,
22 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 */
24
25#include <hal_kernel_types.h>
26#include <hal_shared_types.h>
27
28//////////////////////////////////////////
29inline void hal_disable_irq( reg_t * old )
30{
31        register uint32_t sr;
32       
33        __asm__ volatile 
34                (".set noat                          \n"
35         "mfc0   $1,     $12                 \n"   /* $1    <= c0_sr        */
36                 "or     %0,     $0,     $1          \n"   /* old   <= $1           */
37                 "srl    $1,     $1,     1           \n"
38                 "sll    $1,     $1,     1           \n"   /* clear IE bit in $1    */
39                 "mtc0   $1,     $12                 \n"   /* c0_sr <= $1           */
40         ".set at                            \n"
41                 : "=&r" (sr) );
42
43        if( old ) *old = sr;
44}
45
46/////////////////////////////////////////
47inline void hal_enable_irq( reg_t * old )
48{
49        register uint32_t sr;
50 
51        __asm__ volatile 
52                (".set noat                          \n"
53                 "mfc0   $1,     $12                 \n"   /* s1    <= c0_sr        */
54                 "or     %0,     $0,     $1          \n"   /* old   <= $1           */
55                 "ori    $1,     $1,     0x1         \n"   /* set IE bit in $1      */
56                 "mtc0   $1,     $12                 \n"   /* c0_sr <= $1           */
57         ".set at                            \n"
58                 : "=&r" (sr) );
59 
60        if( old ) *old = sr;
61}
62
63////////////////////////////////////////
64inline void hal_restore_irq( reg_t old )
65{
66        __asm__ volatile 
67                ( "mtc0    %0,    $12" : : "r" (old) );
68}
69
70
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