[16] | 1 | /* |
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[279] | 2 | * hal_kentry.S - Interrupt / Exception / Syscall kernel entry point for MIPS32 |
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[16] | 3 | * |
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| 4 | * AUthors Ghassan Almaless (2007,2008,2009,2010,2011,2012) |
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| 5 | * Mohamed Lamine Karaoui (2015) |
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| 6 | * Alain Greiner (2017) |
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| 7 | * |
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| 8 | * Copyright (c) UPMC Sorbonne Universites |
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| 9 | * |
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| 10 | * This file is part of ALMOS-MKH. |
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| 11 | * |
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| 12 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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| 13 | * under the terms of the GNU General Public License as published by |
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| 14 | * the Free Software Foundation; version 2.0 of the License. |
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| 15 | * |
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| 16 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 19 | * General Public License for more details. |
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| 20 | * |
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| 21 | * You should have received a copy of the GNU General Public License |
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| 22 | * along with ALMOS-MKH; if not, write to the Free Software Foundation, |
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| 23 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 24 | */ |
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| 25 | |
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[406] | 26 | #define UZ_MODE 0 |
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| 27 | #define UZ_AT 1 |
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| 28 | #define UZ_V0 2 |
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| 29 | #define UZ_V1 3 |
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| 30 | #define UZ_A0 4 |
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| 31 | #define UZ_A1 5 |
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| 32 | #define UZ_A2 6 |
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| 33 | #define UZ_A3 7 |
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| 34 | #define UZ_T0 8 |
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| 35 | #define UZ_T1 9 |
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| 36 | #define UZ_T2 10 |
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| 37 | #define UZ_T3 11 |
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| 38 | #define UZ_T4 12 |
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| 39 | #define UZ_T5 13 |
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| 40 | #define UZ_T6 14 |
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| 41 | #define UZ_T7 15 |
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| 42 | #define UZ_T8 16 |
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| 43 | #define UZ_T9 17 |
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| 44 | #define UZ_S0 18 |
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| 45 | #define UZ_S1 19 |
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| 46 | #define UZ_S2 20 |
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| 47 | #define UZ_S3 21 |
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| 48 | #define UZ_S4 22 |
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| 49 | #define UZ_S5 23 |
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| 50 | #define UZ_S6 24 |
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| 51 | #define UZ_S7 25 |
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| 52 | #define UZ_S8 26 |
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| 53 | #define UZ_GP 27 |
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| 54 | #define UZ_RA 28 |
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| 55 | #define UZ_EPC 29 |
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| 56 | #define UZ_CR 30 |
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| 57 | #define UZ_SP 31 |
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| 58 | #define UZ_SR 32 |
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| 59 | #define UZ_LO 33 |
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| 60 | #define UZ_HI 34 |
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[16] | 61 | |
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[406] | 62 | #define UZ_REGS 35 |
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[16] | 63 | |
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[406] | 64 | #include <kernel_config.h> |
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| 65 | |
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[296] | 66 | .section .kentry, "ax", @progbits |
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[279] | 67 | |
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| 68 | .extern hal_do_interrupt |
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| 69 | .extern hal_do_exception |
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| 70 | .extern hal_do_syscall |
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| 71 | .extern cluster_core_kernel_enter |
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[406] | 72 | .extern cluster_core_kentry_exit |
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[279] | 73 | |
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[16] | 74 | .org 0x180 |
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[279] | 75 | |
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[406] | 76 | .global hal_kentry_enter |
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| 77 | .global hal_kentry_eret |
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| 78 | |
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[16] | 79 | .set noat |
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| 80 | .set noreorder |
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| 81 | |
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| 82 | #--------------------------------------------------------------------------------- |
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[279] | 83 | # Kernel Entry point for Interrupt / Exception / Syscall |
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[406] | 84 | # The c2_dext and c2_iext CP2 registers must have been previously set |
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| 85 | # to "local_cxy", because the kernel run with MMU desactivated. |
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[16] | 86 | #--------------------------------------------------------------------------------- |
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| 87 | |
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[406] | 88 | hal_kentry_enter: |
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| 89 | |
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| 90 | mfc0 $26, $12 # get c0_sr |
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| 91 | andi $26, $26, 0x10 # test User Mode bit |
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| 92 | beq $26, $0, kernel_mode # jump if core already in kernel |
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| 93 | ori $27, $0, 0x3 # $27 <= code for MMU OFF |
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[16] | 94 | |
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| 95 | #--------------------------------------------------------------------------------------- |
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[406] | 96 | # This code is executed when the core is in user mode: |
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| 97 | # - save current c2_mode in $26. |
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| 98 | # - set MMU OFF. |
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| 99 | # - save user stack pointer in $27. |
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| 100 | # - set kernel stack pointer in $29. |
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[16] | 101 | |
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| 102 | user_mode: |
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| 103 | |
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[406] | 104 | mfc2 $26, $1 # $26 <= c2_mode |
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| 105 | mtc2 $27, $1 # set MMU OFF |
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| 106 | move $27, $29 # $27 <= user stack pointer |
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| 107 | mfc0 $29, $4, 2 # get pointer on thread descriptor from c0_th |
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| 108 | addi $29, $29, CONFIG_THREAD_DESC_SIZE |
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| 109 | addi $29, $29, -8 # $29 <= kernel stack pointer |
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| 110 | j unified_mode |
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| 111 | nop |
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[16] | 112 | |
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| 113 | #--------------------------------------------------------------------------------------- |
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[406] | 114 | # This code is executed when the core is already in kernel mode: |
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| 115 | # - save current c2_mode in $26. |
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| 116 | # - set MMU OFF. |
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| 117 | # - save current kernel stack pointer in $27. |
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[16] | 118 | |
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| 119 | kernel_mode: |
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| 120 | |
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[406] | 121 | mfc2 $26, $1 # $26 <= c2_mode |
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[16] | 122 | mtc2 $27, $1 # set MMU OFF |
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[406] | 123 | move $27, $29 # $27 <= current kernel stack pointer |
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[16] | 124 | |
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[406] | 125 | #--------------------------------------------------------------------------------------- |
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| 126 | # This code is executed in both modes (user or kernel): |
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| 127 | # The assumptions are: |
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| 128 | # - c2_mode contains the MMU OFF value. |
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| 129 | # - $26 contains the previous c2_mode value. |
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| 130 | # - $27 contains the previous sp value (can be usp or ksp). |
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| 131 | # - $29 contains the kernel stack pointer. |
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| 132 | # We execute the following actions: |
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| 133 | # - allocate an uzone in kernel stack, incrementing $29 |
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| 134 | # - save relevant registers to uzone. |
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| 135 | # - set the SR in kernel mode: IRQ disabled, clear exl. |
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| 136 | # - signal the kernel entry. |
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[16] | 137 | |
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[406] | 138 | unified_mode: |
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[16] | 139 | |
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[406] | 140 | addiu $29, $29, -(UZ_REGS*4) # allocate uzone in kernel stack |
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[16] | 141 | |
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[406] | 142 | sw $1, (UZ_AT*4)($29) |
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| 143 | sw $2, (UZ_V0*4)($29) |
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| 144 | sw $3, (UZ_V1*4)($29) |
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| 145 | sw $4, (UZ_A0*4)($29) |
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| 146 | sw $5, (UZ_A1*4)($29) |
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| 147 | sw $6, (UZ_A2*4)($29) |
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| 148 | sw $7, (UZ_A3*4)($29) |
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| 149 | sw $8, (UZ_T0*4)($29) |
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| 150 | sw $9, (UZ_T1*4)($29) |
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| 151 | sw $10, (UZ_T2*4)($29) |
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| 152 | sw $11, (UZ_T3*4)($29) |
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| 153 | sw $12, (UZ_T4*4)($29) |
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| 154 | sw $13, (UZ_T5*4)($29) |
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| 155 | sw $14, (UZ_T6*4)($29) |
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| 156 | sw $15, (UZ_T7*4)($29) |
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| 157 | sw $16, (UZ_S0*4)($29) |
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| 158 | sw $17, (UZ_S1*4)($29) |
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| 159 | sw $18, (UZ_S2*4)($29) |
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| 160 | sw $19, (UZ_S3*4)($29) |
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| 161 | sw $20, (UZ_S4*4)($29) |
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| 162 | sw $21, (UZ_S5*4)($29) |
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| 163 | sw $22, (UZ_S6*4)($29) |
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| 164 | sw $23, (UZ_S7*4)($29) |
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| 165 | sw $24, (UZ_T8*4)($29) |
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| 166 | sw $25, (UZ_T9*4)($29) |
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[16] | 167 | |
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[406] | 168 | sw $26, (UZ_MODE*4)($29) # save c2_mode |
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| 169 | sw $27, (UZ_SP*4)($29) # save sp |
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[16] | 170 | |
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[406] | 171 | sw $28, (UZ_GP*4)($29) |
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| 172 | sw $30, (UZ_S8*4)($29) |
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| 173 | sw $31, (UZ_RA*4)($29) |
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[16] | 174 | |
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| 175 | mfc0 $16, $14 |
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[406] | 176 | sw $16, (UZ_EPC*4)($29) # save c0_epc |
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[16] | 177 | mflo $14 |
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[406] | 178 | sw $14, (UZ_LO*4)($29) # save lo |
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[16] | 179 | mfhi $15 |
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[406] | 180 | sw $15, (UZ_HI*4)($29) # save hi |
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[16] | 181 | mfc0 $18, $12 |
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[406] | 182 | sw $18, (UZ_SR*4)($29) # save c0_sr |
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[16] | 183 | mfc0 $17, $13 |
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[406] | 184 | sw $17, (UZ_CR*4)($29) # save c0_cr |
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| 185 | mfc2 $26, $1 |
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[16] | 186 | |
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[279] | 187 | srl $3, $18, 5 |
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[16] | 188 | sll $3, $3, 5 |
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[406] | 189 | mtc0 $3, $12 # set new sr |
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[16] | 190 | |
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| 191 | # signal that core enters kernel |
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[279] | 192 | la $1, cluster_core_kernel_enter |
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[406] | 193 | jalr $1 |
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[16] | 194 | nop |
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| 195 | |
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| 196 | #--------------------------------------------------------------------------------------- |
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[279] | 197 | # This code call the relevant Interrupt / Exception / Syscall handler, |
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[406] | 198 | # depending on XCODE in CP0_CR. |
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| 199 | # assumption: $29 contains the kernel stack pointer, that is the uzone base. |
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[279] | 200 | # The three handlers take the same two arguments: thread pointer and uzone pointer. |
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[406] | 201 | # The uzone pointer is saved in $19 to be used by kentry_exit. |
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[16] | 202 | |
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[296] | 203 | mfc0 $17, $13 # $17 <= CR |
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| 204 | andi $17, $17, 0x3F # $17 <= XCODE |
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[279] | 205 | |
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[16] | 206 | mfc0 $4, $4, 2 # $4 <= thread pointer (first arg) |
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[406] | 207 | or $5, $0, $29 # $5 <= uzone pointer (second arg) |
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| 208 | or $19, $0, $29 # $19 <= &uzone (for kentry_exit) |
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[16] | 209 | |
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| 210 | ori $8, $0, 0x20 # $8 <= cause syscall |
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[296] | 211 | beq $8, $17, cause_sys # go to syscall handler |
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[16] | 212 | nop |
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[296] | 213 | beq $17, $0, cause_int # go to interrupt handler |
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[16] | 214 | nop |
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| 215 | |
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| 216 | cause_excp: |
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| 217 | la $1, hal_do_exception |
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| 218 | jalr $1 # call exception handler |
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| 219 | addiu $29, $29, -8 # hal_do_exception has 2 args |
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| 220 | addiu $29, $29, 8 |
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[406] | 221 | j kentry_exit # jump to kentry_exit |
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[16] | 222 | nop |
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| 223 | |
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| 224 | cause_sys: |
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| 225 | la $1, hal_do_syscall |
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| 226 | jalr $1 # call syscall handler |
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| 227 | addiu $29, $29, -8 # hal_do_syscall has 2 args |
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| 228 | addiu $29, $29, 8 |
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[406] | 229 | j kentry_exit # jump to kentry_exit |
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[279] | 230 | nop |
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[16] | 231 | |
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| 232 | cause_int: |
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| 233 | la $1, hal_do_interrupt |
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| 234 | jalr $1 # call interrupt handler |
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| 235 | addiu $29, $29, -8 # hal_do_interrupt has 2 args |
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| 236 | addiu $29, $29, 8 |
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| 237 | |
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| 238 | # ----------------------------------------------------------------------------------- |
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[279] | 239 | # Kernel exit |
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| 240 | # The pointer on uzone is supposed to be stored in $19 |
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[16] | 241 | # ----------------------------------------------------------------------------------- |
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[406] | 242 | kentry_exit: |
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[16] | 243 | |
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| 244 | # signal that core exit kernel |
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[279] | 245 | la $1, cluster_core_kernel_exit |
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| 246 | jalr $1 |
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| 247 | nop |
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[16] | 248 | |
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[406] | 249 | # restore registers from uzone |
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[16] | 250 | or $27, $0, $19 # $27 <= &uzone |
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| 251 | |
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| 252 | lw $29, (UZ_SP*4)($27) # restore SP from uzone |
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| 253 | lw $16, (UZ_EPC*4)($27) |
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| 254 | mtc0 $16, $14 # restore EPC from uzone |
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| 255 | lw $16, (UZ_HI*4)($27) |
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| 256 | mthi $16 # restore HI from uzone |
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| 257 | lw $16, (UZ_LO*4)($27) |
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| 258 | mtlo $16 # restore LO from uzone |
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| 259 | |
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| 260 | lw $17, (UZ_SR*4)($27) # get saved SR value from uzone |
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| 261 | andi $17, $17, 0x1F # keep only the 5 LSB bits |
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| 262 | mfc0 $26, $12 # get current SR value from CP0 |
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| 263 | or $26, $26, $17 # merge the two values |
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| 264 | mtc0 $26, $12 # setup new SR to CP0 |
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| 265 | |
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| 266 | lw $1, (UZ_AT*4)($27) |
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| 267 | lw $2, (UZ_V0*4)($27) |
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| 268 | lw $3, (UZ_V1*4)($27) |
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| 269 | lw $4, (UZ_A0*4)($27) |
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| 270 | lw $5, (UZ_A1*4)($27) |
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| 271 | lw $6, (UZ_A2*4)($27) |
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| 272 | lw $7, (UZ_A3*4)($27) |
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| 273 | lw $8, (UZ_T0*4)($27) |
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| 274 | lw $9, (UZ_T1*4)($27) |
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| 275 | lw $10, (UZ_T2*4)($27) |
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| 276 | lw $11, (UZ_T3*4)($27) |
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| 277 | lw $12, (UZ_T4*4)($27) |
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| 278 | lw $13, (UZ_T5*4)($27) |
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| 279 | lw $14, (UZ_T6*4)($27) |
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| 280 | lw $15, (UZ_T7*4)($27) |
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| 281 | lw $16, (UZ_S0*4)($27) |
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| 282 | lw $17, (UZ_S1*4)($27) |
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| 283 | lw $18, (UZ_S2*4)($27) |
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| 284 | lw $19, (UZ_S3*4)($27) |
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| 285 | lw $20, (UZ_S4*4)($27) |
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| 286 | lw $21, (UZ_S5*4)($27) |
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| 287 | lw $22, (UZ_S6*4)($27) |
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| 288 | lw $23, (UZ_S7*4)($27) |
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| 289 | lw $24, (UZ_T8*4)($27) |
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| 290 | lw $25, (UZ_T9*4)($27) |
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| 291 | lw $28, (UZ_GP*4)($27) |
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| 292 | lw $30, (UZ_S8*4)($27) |
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| 293 | lw $31, (UZ_RA*4)($27) |
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| 294 | |
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[279] | 295 | lw $26, (UZ_MODE*4)($27) |
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| 296 | mtc2 $26, $1 # restore CP2_MODE from uzone |
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[16] | 297 | |
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[406] | 298 | # ----------------------------------------------------------------------------------- |
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| 299 | # eret function |
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| 300 | # ----------------------------------------------------------------------------------- |
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| 301 | |
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| 302 | hal_kentry_eret: |
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[16] | 303 | nop |
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| 304 | eret |
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| 305 | |
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| 306 | .set reorder |
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| 307 | .set at |
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| 308 | |
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[406] | 309 | #------------------------------------------------------------------------------------ |
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[16] | 310 | |
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