1 | /* |
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2 | * hal_kentry.h - MIPS32 registers mnemonics |
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3 | * |
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4 | * Copyright (c) 2008,2009,2010,2011,2012 Ghassan Almaless |
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5 | * Copyright (c) 2011,2012 UPMC Sorbonne Universites |
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6 | * |
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7 | * This file is part of ALMOS-kernel. |
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8 | * |
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9 | * ALMOS-kernel is free software; you can redistribute it and/or modify it |
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10 | * under the terms of the GNU General Public License as published by |
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11 | * the Free Software Foundation; version 2.0 of the License. |
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12 | * |
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13 | * ALMOS-kernel is distributed in the hope that it will be useful, but |
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14 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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16 | * General Public License for more details. |
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17 | * |
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18 | * You should have received a copy of the GNU General Public License |
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19 | * along with ALMOS-kernel; if not, write to the Free Software Foundation, |
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20 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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21 | */ |
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22 | |
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23 | #ifndef _HAL_KENTRY_H_ |
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24 | #define _HAL_KENTRY_H_ |
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25 | |
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26 | ////////////////////////////////////////////////////////////////////////////////////////// |
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27 | // This file defines the MIPS32 specific mnemonics to access the "uzone", that is |
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28 | // a fixed size array of 32 bits integers, used by the kentry function to save/restore |
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29 | // the MIPS32 CPU registers, at each exception / interruption / syscall. |
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30 | // It also defines several initial values for the SR register. |
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31 | // |
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32 | // This file is included in the hal_kentry.S, hal_syscall.c, hal_exception.c, |
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33 | // and hal_context.c files. |
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34 | ////////////////////////////////////////////////////////////////////////////////////////// |
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35 | |
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36 | |
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37 | /**************************************************************************************** |
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38 | * This structure defines the cpu_uzone for TSAR MIPS32, as well as the |
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39 | * mnemonics used by the hal_kentry assembly code. |
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40 | ***************************************************************************************/ |
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41 | |
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42 | #define UZ_MODE 0 /* c2_mode */ |
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43 | #define UZ_AT 1 |
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44 | #define UZ_V0 2 |
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45 | #define UZ_V1 3 |
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46 | #define UZ_A0 4 |
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47 | #define UZ_A1 5 |
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48 | #define UZ_A2 6 |
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49 | #define UZ_A3 7 |
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50 | #define UZ_T0 8 |
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51 | #define UZ_T1 9 |
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52 | #define UZ_T2 10 |
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53 | #define UZ_T3 11 |
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54 | #define UZ_T4 12 |
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55 | #define UZ_T5 13 |
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56 | #define UZ_T6 14 |
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57 | #define UZ_T7 15 |
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58 | #define UZ_T8 16 |
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59 | #define UZ_T9 17 |
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60 | #define UZ_S0 18 |
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61 | #define UZ_S1 19 |
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62 | #define UZ_S2 20 |
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63 | #define UZ_S3 21 |
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64 | #define UZ_S4 22 |
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65 | #define UZ_S5 23 |
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66 | #define UZ_S6 24 |
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67 | #define UZ_S7 25 |
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68 | #define UZ_S8 26 |
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69 | #define UZ_GP 27 |
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70 | #define UZ_RA 28 |
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71 | #define UZ_EPC 29 /* c0_epc */ |
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72 | #define UZ_CR 30 /* c0_cr */ |
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73 | #define UZ_SP 31 |
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74 | #define UZ_SR 32 /* c0_sr */ |
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75 | #define UZ_LO 33 |
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76 | #define UZ_HI 34 |
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77 | |
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78 | #define UZ_REGS 35 |
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79 | |
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80 | /************************************************************************************* |
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81 | * The hal_kentry_enter() function is the unique kernel entry point in case of |
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82 | * exception, interrupt, or syscall for the TSAR_MIPS32 architecture. |
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83 | * |
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84 | * When we enter the kernel, we test the status register: |
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85 | * - If the core is in user mode, we desactivate the MMU, and we save |
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86 | * the core context in the uzone of the calling thread descriptor. |
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87 | * - If the core is already in kernel mode (in case of interrupt), |
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88 | * we save the context in the kernel stack. |
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89 | * - In both cases, we increment the cores_in_kernel variable, |
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90 | * and we call the relevant exception/interrupt/syscall handler |
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91 | * |
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92 | * When we exit the kernel after handler execution: |
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93 | * - we restore the core context from the uzone and return to user space, |
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94 | * calling the hal_kentry_eret() |
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95 | ************************************************************************************/ |
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96 | void hal_kentry_enter(); |
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97 | |
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98 | /************************************************************************************* |
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99 | * The hal_kentry_eret() function contains only the assembly "eret" instruction, |
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100 | * that and the EXL bit in the c0_sr register, and jump to the address |
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101 | * contained in the c0_epc register. |
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102 | * ************************************************************************************/ |
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103 | void hal_kentry_eret(); |
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104 | |
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105 | #endif /* _HAL_KENTRY_H_ */ |
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