source: trunk/hal/tsar_mips32/core/hal_kentry.h @ 626

Last change on this file since 626 was 625, checked in by alain, 5 years ago

Fix a bug in the vmm_remove_vseg() function: the physical pages
associated to an user DATA vseg were released to the kernel when
the target process descriptor was in the reference cluster.
This physical pages release should be done only when the page
forks counter value is zero.
All other modifications are cosmetic.

File size: 4.9 KB
Line 
1/*
2 * hal_kentry.h - uzone definition
3 *
4 * Author     Alain Greiner (2016,2017,2018,2019)
5 *
6 * Copyright (c) UPMC Sorbonne Universites
7 *
8 * This file is part of ALMOS-MKH.
9 *
10 * ALMOS-MKH is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2.0 of the License.
13 *
14 * ALMOS-MKH is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with ALMOS-kernel; if not, write to the Free Software Foundation,
21 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#ifndef _HAL_KENTRY_H_
25#define _HAL_KENTRY_H_
26
27//////////////////////////////////////////////////////////////////////////////////////////
28// This file defines the MIPS32 specific mnemonics to access the "uzone", that is
29// a fixed size array of 32 bits integers, used by the kentry function to save/restore
30// the MIPS32 CPU registers, at each exception / interruption / syscall.
31//
32// This file is included in the hal_kentry.S, hal_syscall.c, hal_exception.c,
33// and hal_context.c files.
34//////////////////////////////////////////////////////////////////////////////////////////
35
36
37/****************************************************************************************
38 * This structure defines the "uzone" dynamically allocated in the kernel stack
39 * by the hal_kentry assembly code to save the MIPS32 registers each time a core
40 * enters the kernel to handle an interrupt, exception, or syscall.
41 * These define are specific for the TSAR_MIPS32 architecture.
42 *
43 * WARNING : It is replicated in hal_kentry.S file.
44 ***************************************************************************************/
45
46#define      UZ_MODE         0    /* c2_mode */             
47#define      UZ_AT           1    /* at_01   */
48#define      UZ_V0           2    /* v0_02   */
49#define      UZ_V1           3    /* v1_03   */
50#define      UZ_A0           4    /* a0_04   */
51#define      UZ_A1           5    /* a1_05   */
52#define      UZ_A2           6    /* a2_06   */
53#define      UZ_A3           7    /* a3_07   */
54#define      UZ_T0           8    /* t0_08   */
55#define      UZ_T1           9    /* t1_09   */
56#define      UZ_T2           10   /* t2_10   */
57#define      UZ_T3           11   /* t3_11   */
58#define      UZ_T4           12   /* t4_12   */
59#define      UZ_T5           13   /* t5_13   */
60#define      UZ_T6           14   /* t6_14   */
61#define      UZ_T7           15   /* t7_15   */
62#define      UZ_S0           16   /* s0_16   */
63#define      UZ_S1           17   /* s1_17   */
64#define      UZ_S2           18   /* s2_18   */
65#define      UZ_S3           19   /* s3_19   */
66#define      UZ_S4           20   /* s4_20   */
67#define      UZ_S5           21   /* s5_21   */
68#define      UZ_S6           22   /* s6_22   */
69#define      UZ_S7           23   /* s7_23   */
70#define      UZ_T8           24   /* t8_24   */
71#define      UZ_T9           25   /* t9_25   */
72
73#define      UZ_LO           26
74#define      UZ_HI           27
75
76#define      UZ_GP           28   /* gp_28   */
77#define      UZ_SP           29   /* sp_29   */
78#define      UZ_S8           30   /* s8_30   */
79#define      UZ_RA           31   /* ra_31   */
80
81#define      UZ_PTPR         32   /* c2_ptpr */
82#define      UZ_EPC          33   /* c0_epc  */
83#define      UZ_SR           34   /* c0_sr   */
84#define      UZ_TH           35   /* c0_th   */
85#define      UZ_CR           36   /* c0_cr   */
86
87#define      UZ_REGS         37
88
89/*************************************************************************************
90 * The hal_kentry_enter() function is the unique kernel entry point in case of
91 * exception, interrupt, or syscall for the TSAR_MIPS32 architecture. 
92 * It can be executed by a core in user mode or by a core already in kernel mode
93 * (in case of interrupt or non fatal exception).
94 * In both cases it allocates an "uzone" space in the kernel stack to save the
95 * CPU registers values, desactivates the MMU, and calls the relevant handler
96 * (exception/interrupt/syscall)
97 *
98 * After handler execution, it restores the CPU context from the uzone and jumps
99 * to address contained in EPC calling the hal_kentry_eret() function.
100 ************************************************************************************/
101void hal_kentry_enter( void );
102
103/*************************************************************************************
104 * The hal_kentry_eret() function contains only the assembly "eret" instruction,
105 * that reset the EXL bit in the c0_sr register, and jumps to the address
106 * contained in the c0_epc register.
107 * ************************************************************************************/
108void hal_kentry_eret( void );
109
110#endif  /* _HAL_KENTRY_H_ */
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