source: trunk/hal/tsar_mips32/core/hal_ppm.c @ 337

Last change on this file since 337 was 315, checked in by alain, 7 years ago

Redefine the fuctions ppm_base2page() / ppm_page2base() / ppm_page2ppn() / ppm_ppn2page() / ppm_base2ppn() / ppm_ppn2base(),
to use explicitely extended pointers.

File size: 4.6 KB
RevLine 
[50]1/*
[107]2 * hal_ppm.c - Generic Physical Page Manager API implementation for TSAR
[50]3 *
4 * Authors  Alain Greiner (2016,2017)
5 *
6 * Copyright (c) UPMC Sorbonne Universites
7 *
8 * This file is part of ALMOS-MKH.
9 *
10 * ALMOS-MKH is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2.0 of the License.
13 *
14 * ALMOS-MKH is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with ALMOS-MKH; if not, write to the Free Software Foundation,
21 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
[53]24#include <kernel_config.h>
25#include <hal_types.h>
26#include <hal_ppm.h>
27#include <hal_special.h>
28#include <printk.h>
29#include <spinlock.h>
30#include <process.h>
31#include <ppm.h>
32#include <thread.h>
33#include <cluster.h>
34#include <page.h>
[50]35
36//////////////////////////////////////////////////////////////////////////////////////////
[313]37// This file contains the TSAR specific code for :
38// - cores registers initialisation,
39// - memory allocators initialisation.
40//
[106]41// For The TSAR architecture, the kernel pointers are identity mapped:
42// - the 32 bits PTR value is identical to the 32 bits LPA value,
[50]43// - the 64 bits XPTR value is identical to the 64 bits PADDR value.
[296]44// This hal_ppm_init() function initializes the pages_tbl[] array used by the generic
45// kmem memory allocator in the local cluster. This array starts in first free page
46// after kernel code, as defined by the 'offset' field in boot_info.
47//
48// For the TSAR architecture the MIP32 EBASE register defining the kernel entry point
49// fot Interrupts, Exceptions and Syscalls, has to be redefined.
[50]50//////////////////////////////////////////////////////////////////////////////////////////
51
[53]52///////////////////////////////////////////
53error_t  hal_ppm_init( boot_info_t * info )
[50]54{
[106]55        uint32_t i;
[53]56
[106]57        // get relevant info from boot_info structure
[107]58        uint32_t pages_nr         = info->pages_nr;
59        uint32_t pages_tbl_offset = info->pages_offset;
[50]60
[106]61        // get pointer on local Physical Page Manager
62        ppm_t * ppm = &LOCAL_CLUSTER->ppm;
63
64        // initialize lock protecting the free_pages[] lists
[50]65        spinlock_init( &ppm->free_lock );
66
[106]67        // initialize lock protecting the dirty_pages list
[50]68        spinlock_init( &ppm->dirty_lock );
69
[106]70        // initialize all free_pages[] lists as empty
[50]71        for( i = 0 ; i < CONFIG_PPM_MAX_ORDER ; i++ )
72        {
73                list_root_init( &ppm->free_pages_root[i] );
74                ppm->free_pages_nr[i] = 0;
75        }
76
[106]77        // initialize dirty_list as empty
78        list_root_init( &ppm->dirty_root );
[50]79
[106]80        // compute size of pages_tbl[] array rounded to an integer number of pages
81        uint32_t bytes = ARROUND_UP( pages_nr * sizeof(page_t), CONFIG_PPM_PAGE_SIZE );
[50]82
[106]83        // compute number of pages required to store page descriptor array
[50]84        uint32_t pages_tbl_nr = bytes >> CONFIG_PPM_PAGE_SHIFT;
85
[106]86        // compute total number of reserved pages (kernel code & pages_tbl[])
[53]87        uint32_t reserved_pages = pages_tbl_offset + pages_tbl_nr;
[50]88
[107]89        // initialize pages_nr, pages_tbl, and vaddr_base pointers
90        // (TSAR uses identity mapping for kernel pointers)
91        // x86 architectures should use vaddr_base = 0xFFFF8000000000 + (cxy << 36)
92        ppm->pages_nr   = pages_nr;
93        ppm->vaddr_base = NULL;
94        ppm->pages_tbl  = (page_t*)( ppm->vaddr_base +
95                                     (pages_tbl_offset << CONFIG_PPM_PAGE_SHIFT) );
96
[106]97        // initialize all page descriptors in pages_tbl[]
[50]98        for( i = 0 ; i < pages_nr ; i++ )
[106]99        {
100                page_init( &ppm->pages_tbl[i] );
[50]101
[106]102                // TODO optimisation for this enormous loop on small pages:
103                // make only a partial init with a memset, and complete the
104                // initialisation when page is allocated [AG]
105        }
[50]106
[106]107        // - set PG_RESERVED flag for reserved pages (kernel code & pages_tbl[])
108        // - release all other pages to populate the free lists
[50]109        for( i = 0 ; i < reserved_pages ; i++)
[106]110        {
111                page_set_flag( &ppm->pages_tbl[i] , PG_RESERVED );
112        }
[50]113        for( i = reserved_pages ; i < pages_nr ; i++ )
114        {
[106]115                ppm_free_pages_nolock( &ppm->pages_tbl[i] );
[50]116
[106]117                // TODO optimisation : decompose this enormous set of small pages
118                // to several sets of big pages with various order values
[50]119        }
120
[106]121        // check consistency
122        return ppm_assert_order( ppm );
[50]123
[296]124}  // end hal_ppm_init()
125
126////////////////////////////////////////
127void hal_core_init( boot_info_t * info )
128{
129        // get relevant info from boot_info structure
130        reg_t kentry_base = info->kentry_base;
131
132    // set CP0_EBASE register
133    hal_set_ebase( kentry_base );
134
135}  // end hal_core_init()
[313]136
137
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