source: trunk/hal/tsar_mips32/core/hal_ppm.c @ 308

Last change on this file since 308 was 296, checked in by alain, 5 years ago

Several modifs in the generic scheduler and in the hal_context to
fix the context switch mechanism.

File size: 4.6 KB
Line 
1/*
2 * hal_ppm.c - Generic Physical Page Manager API implementation for TSAR
3 *
4 * Authors  Alain Greiner (2016,2017)
5 *
6 * Copyright (c) UPMC Sorbonne Universites
7 *
8 * This file is part of ALMOS-MKH.
9 *
10 * ALMOS-MKH is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2.0 of the License.
13 *
14 * ALMOS-MKH is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with ALMOS-MKH; if not, write to the Free Software Foundation,
21 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#include <kernel_config.h>
25#include <hal_types.h>
26#include <hal_ppm.h>
27#include <hal_special.h>
28#include <printk.h>
29#include <spinlock.h>
30#include <process.h>
31#include <ppm.h>
32#include <thread.h>
33#include <cluster.h>
34#include <page.h>
35
36//////////////////////////////////////////////////////////////////////////////////////////
37// This file contains the TSAR specific code for cores registers,
38// and for physical memory allocators initialisation in a given cluster.
39
40// For The TSAR architecture, the kernel pointers are identity mapped:
41// - the 32 bits PTR value is identical to the 32 bits LPA value,
42// - the 64 bits XPTR value is identical to the 64 bits PADDR value.
43// This hal_ppm_init() function initializes the pages_tbl[] array used by the generic
44// kmem memory allocator in the local cluster. This array starts in first free page
45// after kernel code, as defined by the 'offset' field in boot_info.
46//
47// For the TSAR architecture the MIP32 EBASE register defining the kernel entry point
48// fot Interrupts, Exceptions and Syscalls, has to be redefined.
49//////////////////////////////////////////////////////////////////////////////////////////
50
51///////////////////////////////////////////
52error_t  hal_ppm_init( boot_info_t * info )
53{
54        uint32_t i;
55
56        // get relevant info from boot_info structure
57        uint32_t pages_nr         = info->pages_nr;
58        uint32_t pages_tbl_offset = info->pages_offset;
59
60        // get pointer on local Physical Page Manager
61        ppm_t * ppm = &LOCAL_CLUSTER->ppm;
62
63        // initialize lock protecting the free_pages[] lists
64        spinlock_init( &ppm->free_lock );
65
66        // initialize lock protecting the dirty_pages list
67        spinlock_init( &ppm->dirty_lock );
68
69        // initialize all free_pages[] lists as empty
70        for( i = 0 ; i < CONFIG_PPM_MAX_ORDER ; i++ )
71        {
72                list_root_init( &ppm->free_pages_root[i] );
73                ppm->free_pages_nr[i] = 0;
74        }
75
76        // initialize dirty_list as empty
77        list_root_init( &ppm->dirty_root );
78
79        // compute size of pages_tbl[] array rounded to an integer number of pages
80        uint32_t bytes = ARROUND_UP( pages_nr * sizeof(page_t), CONFIG_PPM_PAGE_SIZE );
81
82        // compute number of pages required to store page descriptor array
83        uint32_t pages_tbl_nr = bytes >> CONFIG_PPM_PAGE_SHIFT;
84
85        // compute total number of reserved pages (kernel code & pages_tbl[])
86        uint32_t reserved_pages = pages_tbl_offset + pages_tbl_nr;
87
88        // initialize pages_nr, pages_tbl, and vaddr_base pointers
89        // (TSAR uses identity mapping for kernel pointers)
90        // x86 architectures should use vaddr_base = 0xFFFF8000000000 + (cxy << 36)
91        ppm->pages_nr   = pages_nr;
92        ppm->vaddr_base = NULL;
93        ppm->pages_tbl  = (page_t*)( ppm->vaddr_base +
94                                     (pages_tbl_offset << CONFIG_PPM_PAGE_SHIFT) );
95
96        // initialize all page descriptors in pages_tbl[]
97        for( i = 0 ; i < pages_nr ; i++ )
98        {
99                page_init( &ppm->pages_tbl[i] );
100
101                // TODO optimisation for this enormous loop on small pages:
102                // make only a partial init with a memset, and complete the
103                // initialisation when page is allocated [AG]
104        }
105
106        // - set PG_RESERVED flag for reserved pages (kernel code & pages_tbl[])
107        // - release all other pages to populate the free lists
108        for( i = 0 ; i < reserved_pages ; i++)
109        {
110                page_set_flag( &ppm->pages_tbl[i] , PG_RESERVED );
111        }
112        for( i = reserved_pages ; i < pages_nr ; i++ )
113        {
114                ppm_free_pages_nolock( &ppm->pages_tbl[i] );
115
116                // TODO optimisation : decompose this enormous set of small pages
117                // to several sets of big pages with various order values
118        }
119
120        // check consistency
121        return ppm_assert_order( ppm );
122
123}  // end hal_ppm_init()
124
125////////////////////////////////////////
126void hal_core_init( boot_info_t * info )
127{
128        // get relevant info from boot_info structure
129        reg_t kentry_base = info->kentry_base;
130
131    // set CP0_EBASE register
132    hal_set_ebase( kentry_base );
133
134}  // end hal_core_init()
Note: See TracBrowser for help on using the repository browser.