source: trunk/hal/tsar_mips32/drivers/soclib_xcu.c @ 133

Last change on this file since 133 was 133, checked in by max@…, 5 years ago

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1/*
2 * soclib_xcu.c - soclib XCU driver API implementation.
3 *
4 * Authors  Alain Greiner    (2016)
5 *
6 * Copyright (c) UPMC Sorbonne Universites
7 *
8 * This file is part of ALMOS-MKH.
9 *
10 * ALMOS-MKH is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2.0 of the License.
13 *
14 * ALMOS-MKH is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with ALMOS-kernel; if not, write to the Free Software Foundation,
21 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#include <soclib_xcu.h>
25#include <hal_types.h>
26#include <core.h>
27#include <chdev.h>
28
29////////////////////////////////////
30void soclib_xcu_init( chdev_t * icu,
31                      lid_t     lid )
32{
33    // get local ICU segment base address
34    uint32_t * base = (uint32_t *)GET_PTR( icu->base );
35
36    // disable all IRQs
37    base[XCU_MSK_HWI_DISABLE << 5 | lid] = 0xFFFFFFFF;
38    base[XCU_MSK_WTI_DISABLE << 5 | lid] = 0xFFFFFFFF;
39    base[XCU_MSK_PTI_DISABLE << 5 | lid] = 0xFFFFFFFF;
40}
41
42////////////////////////////////////////////
43void soclib_xcu_disable_irq( chdev_t  * icu,
44                             uint32_t   mask,
45                             uint32_t   type,
46                             lid_t      lid )
47{
48    // get XCU segment base address
49    uint32_t * base = (uint32_t *)GET_PTR( icu->base );
50
51    // write into register
52    if     ( type == WTI_TYPE ) base[XCU_MSK_WTI_DISABLE << 5 | lid] = mask;
53    else if( type == HWI_TYPE ) base[XCU_MSK_HWI_DISABLE << 5 | lid] = mask;
54    else                        base[XCU_MSK_PTI_DISABLE << 5 | lid] = mask;
55}
56
57///////////////////////////////////////////
58void soclib_xcu_enable_irq( chdev_t  * icu,
59                            uint32_t   mask,
60                            uint32_t   type,
61                            lid_t      lid )
62{
63    // get XCU segment base address
64    uint32_t * base = (uint32_t *)GET_PTR( icu->base );
65
66    // write into register
67    if     ( type == WTI_TYPE ) base[XCU_MSK_WTI_ENABLE << 5 | lid] = mask;
68    else if( type == HWI_TYPE ) base[XCU_MSK_HWI_ENABLE << 5 | lid] = mask;
69    else                        base[XCU_MSK_PTI_ENABLE << 5 | lid] = mask;
70}
71
72///////////////////////////////////////////
73void soclib_xcu_get_masks( chdev_t   * icu,
74                           lid_t       lid,
75                           uint32_t  * hwi_mask,
76                           uint32_t  * wti_mask,
77                           uint32_t  * pti_mask )
78{
79    // get XCU segment base address
80    uint32_t * base = (uint32_t *)GET_PTR( icu->base );
81
82    // get values from registers
83    *hwi_mask = base[XCU_MSK_HWI << 5 | lid];
84    *wti_mask = base[XCU_MSK_WTI << 5 | lid];
85    *pti_mask = base[XCU_MSK_PTI << 5 | lid];
86}
87
88//////////////////////////////////////////
89void soclib_xcu_set_period( chdev_t * icu,
90                            uint32_t  index,
91                            uint32_t  period )
92{
93    // get local ICU segment base address
94    uint32_t * base = (uint32_t *)GET_PTR( icu->base );
95
96    // write into register
97    base[XCU_PTI_PER << 5 | index] = period;
98}
99
100/////////////////////////////////////////////
101uint32_t soclib_xcu_ack_timer( chdev_t * icu,
102                               uint32_t  index )
103{
104    // get local ICU segment base address
105    uint32_t * base = (uint32_t *)GET_PTR( icu->base );
106
107    // read from register
108    return base[XCU_PTI_ACK << 5 | index];
109}
110
111///////////////////////////////////////////
112void soclib_xcu_get_status( chdev_t  * icu,
113                            lid_t      lid,
114                            uint32_t * hwi_status,
115                            uint32_t * wti_status,
116                            uint32_t * pti_status )
117{
118    // get local ICU segment base address
119    uint32_t * base = (uint32_t *)GET_PTR( icu->base );
120
121    // read PRIO register
122    uint32_t prio = base[XCU_PRIO << 5 | lid];
123
124    *wti_status = (prio & 0x4) ? (((prio >> 24) & 0x1F) + 1) : 0;
125    *hwi_status = (prio & 0x2) ? (((prio >> 16) & 0x1F) + 1) : 0;
126    *pti_status = (prio & 0x1) ? (((prio >>  8) & 0x1F) + 1) : 0;
127}
128
129/////////////////////////////////////////
130void soclib_xcu_send_ipi( xptr_t  icu_xp,
131                          lid_t   lid )
132{
133    // get target ICU device cluster and local pointer
134    cxy_t       cxy_icu = GET_CXY( icu_xp );
135    chdev_t  * ptr_icu = (chdev_t *)GET_PTR( icu_xp );
136
137    // get extended pointer on target ICU segment base
138    xptr_t  xp_base = (xptr_t)hal_remote_lwd( XPTR( cxy_icu , &ptr_icu->base ) );
139
140    // get remote ICU segment local pointer
141    uint32_t  * base = (uint32_t *)GET_PTR( xp_base );
142
143    // send IPI to remote core
144    hal_remote_sw( XPTR( cxy_icu , &base[XCU_WTI_REG << 5 | lid] ) , 0 );
145}
146
147//////////////////////////////////////////////
148uint32_t * soclib_xcu_wti_ptr( chdev_t  * icu,
149                               uint32_t   index )
150{
151    uint32_t * base = (uint32_t *)GET_PTR( icu->base );
152
153    return &base[XCU_WTI_REG << 5 | index];
154}
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