source: trunk/hal/tsar_mips32/drivers/soclib_xcu.c @ 75

Last change on this file since 75 was 75, checked in by max@…, 5 years ago

Create the drivers/ sub-directory in each hal, and move soclib
into it. Note that soclib is not valid for x86_64, but more
changes will come.

File size: 5.1 KB
Line 
1/*
2 * soclib_xcu.c - soclib XCU driver API implementation.
3 *
4 * Authors  Alain Greiner    (2016)
5 *
6 * Copyright (c) UPMC Sorbonne Universites
7 *
8 * This file is part of ALMOS-MKH.
9 *
10 * ALMOS-MKH.is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2.0 of the License.
13 *
14 * ALMOS-MKH.is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with ALMOS-kernel; if not, write to the Free Software Foundation,
21 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#include <soclib_xcu.h>
25#include <hal_types.h>
26#include <core.h>
27#include <chdev.h>
28
29
30
31////////////////////////////////////
32void soclib_xcu_init( chdev_t * icu,
33                      lid_t     lid )
34{
35    // get local ICU segment base address
36        uint32_t * base = (uint32_t *)GET_PTR( icu->base );
37
38    // disable all IRQs
39    base[XCU_MSK_HWI_DISABLE << 5 | lid] = 0xFFFFFFFF;
40    base[XCU_MSK_WTI_DISABLE << 5 | lid] = 0xFFFFFFFF;
41    base[XCU_MSK_PTI_DISABLE << 5 | lid] = 0xFFFFFFFF;
42}
43
44////////////////////////////////////////////
45void soclib_xcu_disable_irq( chdev_t  * icu,
46                             uint32_t   mask,
47                             uint32_t   type,
48                             lid_t      lid )
49{
50    // get XCU segment base address
51        uint32_t * base = (uint32_t *)GET_PTR( icu->base );
52
53    // write into register
54        if     ( type == WTI_TYPE ) base[XCU_MSK_WTI_DISABLE << 5 | lid] = mask;
55        else if( type == HWI_TYPE ) base[XCU_MSK_HWI_DISABLE << 5 | lid] = mask;
56        else                        base[XCU_MSK_PTI_DISABLE << 5 | lid] = mask;
57}
58
59///////////////////////////////////////////
60void soclib_xcu_enable_irq( chdev_t  * icu,
61                            uint32_t   mask,
62                            uint32_t   type,
63                            lid_t      lid )
64{
65    // get XCU segment base address
66        uint32_t * base = (uint32_t *)GET_PTR( icu->base );
67
68    // write into register
69        if     ( type == WTI_TYPE ) base[XCU_MSK_WTI_ENABLE << 5 | lid] = mask;
70        else if( type == HWI_TYPE ) base[XCU_MSK_HWI_ENABLE << 5 | lid] = mask;
71        else                        base[XCU_MSK_PTI_ENABLE << 5 | lid] = mask;
72}
73
74///////////////////////////////////////////
75void soclib_xcu_get_masks( chdev_t   * icu,
76                           lid_t       lid,
77                           uint32_t  * hwi_mask,
78                           uint32_t  * wti_mask,
79                           uint32_t  * pti_mask )
80{
81    // get XCU segment base address
82        uint32_t * base = (uint32_t *)GET_PTR( icu->base );
83 
84    // get values from registers
85    *hwi_mask = base[XCU_MSK_HWI << 5 | lid]; 
86    *wti_mask = base[XCU_MSK_WTI << 5 | lid]; 
87    *pti_mask = base[XCU_MSK_PTI << 5 | lid]; 
88}
89
90//////////////////////////////////////////
91void soclib_xcu_set_period( chdev_t * icu,
92                            uint32_t  index,
93                            uint32_t  period )
94{
95    // get local ICU segment base address
96        uint32_t * base = (uint32_t *)GET_PTR( icu->base );
97
98    // write into register
99    base[XCU_PTI_PER << 5 | index] = period;
100}
101
102/////////////////////////////////////////////
103uint32_t soclib_xcu_ack_timer( chdev_t * icu,
104                               uint32_t  index )
105{
106    // get local ICU segment base address
107        uint32_t * base = (uint32_t *)GET_PTR( icu->base );
108
109    // read from register
110        return base[XCU_PTI_ACK << 5 | index];
111}
112
113///////////////////////////////////////////
114void soclib_xcu_get_status( chdev_t  * icu,
115                            lid_t      lid,
116                            uint32_t * hwi_status,
117                            uint32_t * wti_status,
118                            uint32_t * pti_status )
119{
120    // get local ICU segment base address
121    uint32_t * base = (uint32_t *)GET_PTR( icu->base );
122
123    // read PRIO register
124        uint32_t prio = base[XCU_PRIO << 5 | lid];
125
126    *wti_status = (prio & 0x4) ? (((prio >> 24) & 0x1F) + 1) : 0;
127    *hwi_status = (prio & 0x2) ? (((prio >> 16) & 0x1F) + 1) : 0;
128    *pti_status = (prio & 0x1) ? (((prio >>  8) & 0x1F) + 1) : 0;
129}
130
131/////////////////////////////////////////
132void soclib_xcu_send_ipi( xptr_t  icu_xp,
133                          lid_t   lid )
134{
135    // get target ICU device cluster and local pointer
136    cxy_t       cxy_icu = GET_CXY( icu_xp );
137    chdev_t  * ptr_icu = (chdev_t *)GET_PTR( icu_xp );
138
139    // get extended pointer on target ICU segment base
140    xptr_t  xp_base = (xptr_t)hal_remote_lwd( XPTR( cxy_icu , &ptr_icu->base ) );
141
142    // get remote ICU segment local pointer
143        uint32_t  * base = (uint32_t *)GET_PTR( xp_base );
144
145    // send IPI to remote core
146        hal_remote_sw( XPTR( cxy_icu , &base[XCU_WTI_REG << 5 | lid] ) , 0 );
147}
148
149//////////////////////////////////////////////
150uint32_t * soclib_xcu_wti_ptr( chdev_t  * icu,
151                               uint32_t   index )
152{
153    uint32_t * base = (uint32_t *)GET_PTR( icu->base );
154
155    return &base[XCU_WTI_REG << 5 | index];
156}
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