source: trunk/hal/tsar_mips32/hal_arch.c @ 1

Last change on this file since 1 was 1, checked in by alain, 5 years ago

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1/*
2 * hal_arch.c - Implementation of generic Inter-Processor-Interrupt API for TSAR-MIPS32
3 *
4 * Authors   Alain Greiner  (2016)
5 *
6 * Copyright (c) UPMC Sorbonne Universites
7 *
8 * This file is part of ALMOS-MKH.
9 *
10 * ALMOS-MKH.is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2.0 of the License.
13 *
14 * ALMOS-MKH.is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with ALMOS-MKH.; if not, write to the Free Software Foundation,
21 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#include <errno.h>
25#include <types.h>
26#include <thread.h>
27#include <core.h>
28#include <system.h>
29#include <kmem.h>
30#include <device.h>
31#include <cluster.h>
32#include <soclib_xicu.h>
33#include <kdmsg.h>
34#include <arch.h>
35
36/////////////////////////////////////////////////////////////////////////////////////////////
37// This global varible define the TSAR architecture specific XCU device decriptor,
38// that is replicated in all clusters.
39/////////////////////////////////////////////////////////////////////////////////////////////
40static void cpu_default_irq_handler(struct irq_action_s *action)
41{
42        unsigned int irq_num = (unsigned int) action->data;
43
44        isr_dmsg(WARNING, "WARNING: No registered handler fo IRQ %d on CPU %d\n",
45             irq_num, cpu_get_id());
46        cpu_disable_single_irq(irq_num, NULL);
47        isr_dmsg(WARNING, "WARNING: IRQ %d on CPU %d has been masked\n", irq_num, cpu_get_id());
48}
49
50//////////////////////////////////////
51error_t arch_cpu_init( core_t * core )
52{
53        register int i;
54        register struct irq_action_s *action_ptr;
55        kmem_req_t req;
56 
57        req.type  = KMEM_GENERIC;
58        req.size  = sizeof(*action_ptr);
59        req.flags = AF_BOOT | AF_ZERO;
60
61        for(i=1; i < CPU_IRQ_NR; i++)
62        {
63                if((action_ptr = kmem_alloc(&req)) == NULL)
64                        return ENOMEM;
65
66                action_ptr->irq_handler = &cpu_default_irq_handler;
67                action_ptr->data = (void *) i;
68                arch_cpu_set_irq_entry(cpu, i, action_ptr);
69        }
70
71        return 0;
72}
73
74////////////////////////////////////////////////
75error_t arch_cpu_set_irq_entry( core_t   * core,
76                                uint32_t   irq_nr,
77                                struct irq_action_s *action )
78{
79        core->arch.irq_vector[irq_nr] = action;
80        return 0;
81}
82
83////////////////////////////////////////////////
84error_t arch_cpu_get_irq_entry( core_t   * core,
85                                uint32_t   irq_nr,
86                                struct irq_action_s **action)
87{
88        *action = cpu->arch.irq_vector[irq_nr];
89        return 0;
90}
91
92////////////////////////////////////////////   
93error_t arch_set_power_state( core_t * core,
94                              arch_power_state_t state)
95{
96        switch(state)
97        {
98        case ARCH_PWR_IDLE:
99                cpu_power_idle();
100                return 0;
101
102        case ARCH_PWR_SLEEP:
103
104        case ARCH_PWR_SHUTDOWN:
105                printk(WARNING, "WARNING: Unexpected power state (%d) has been asked for CPU %d, of Cluster %d\n", 
106                       state, 
107                       cpu->lid, 
108                       cpu->cluster->id);
109                return 0;
110        default:
111                printk(ERROR, "ERROR: Unknown power state (%d) has been asked for CPU %d, of Cluster %d\n", 
112                       state, 
113                       cpu->lid, 
114                       cpu->cluster->id);
115
116                return EINVAL;
117        }
118}
119
120/////////////////////////
121sint_t arch_barrier_init(struct cluster_s *cluster, struct event_s *event, uint_t count)
122{
123        return soclib_xicu_barrier_init(get_arch_entry(cluster->id)->xicu, event, count);
124}
125
126//////////////////////////
127sint_t arch_barrier_wait(struct cluster_s *cluster, uint_t barrier_id)
128{
129        return soclib_xicu_barrier_wait(get_arch_entry(cluster->id)->xicu, barrier_id);
130}
131
132/////////////////////////////
133error_t arch_barrier_destroy(struct cluster_s *cluster, uint_t barrier_id)
134{
135        return soclib_xicu_barrier_destroy(get_arch_entry(cluster->id)->xicu, barrier_id);
136}
137
138
139///////////////////////////////////
140error_t hal_send_ipi( cxy_t    cxy,
141                      lid_t    lid, 
142                      uint32_t val )
143{
144    // check arguments
145
146    // get local pointer on target XCU device
147    device_t  * ptr = xcu_device
148        return soclib_xicu_ipi_send(get_arch_entry(cid)->xicu, lid, val);
149}
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