source: trunk/hal/tsar_mips32/hal_arch.h @ 1

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1/*
2 * hal_arch.h - Generic Inter-Processor-Interrupt API definition.
3 *
4 * Authors   Alain Greiner  (2016)
5 *
6 * Copyright (c) UPMC Sorbonne Universites
7 *
8 * This file is part of ALMOS-MKH.
9 *
10 * ALMOS-MKH is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2.0 of the License.
13 *
14 * ALMOS-MKH is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with ALMOS-MKH; if not, write to the Free Software Foundation,
21 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#include <hal_types.h>
25#include <soclib_xicu.h>
26
27/*****************************************************************************************
28 * This enum defines the various Inter Processor Interrupt types.
29 ****************************************************************************************/
30
31enum ipi_types
32{
33    IPI_RPC_PENDING,        // signal a new pending RPC
34    IPI_SCHED_REQUEST,      // request a core scheduling
35    IPI_MAX_NUMBER
36};
37
38
39/*****************************************************************************************
40 ****************************************************************************************/
41static void cpu_default_irq_handler(struct irq_action_s *action)
42{
43        unsigned int irq_num = (unsigned int) action->data;
44
45        isr_dmsg(WARNING, "WARNING: No registered handler fo IRQ %d on CPU %d\n", irq_num, cpu_get_id());
46        cpu_disable_single_irq(irq_num, NULL);
47        isr_dmsg(WARNING, "WARNING: IRQ %d on CPU %d has been masked\n", irq_num, cpu_get_id());
48}
49
50////////////////////////////////////////
51error_t hal_arch_init(struct cpu_s *cpu)
52{
53        register int i;
54        register struct irq_action_s *action_ptr;
55        kmem_req_t req;
56 
57        req.type  = KMEM_GENERIC;
58        req.size  = sizeof(*action_ptr);
59        req.flags = AF_BOOT | AF_ZERO;
60
61        for(i=1; i < CPU_IRQ_NR; i++)
62        {
63                if((action_ptr = kmem_alloc(&req)) == NULL)
64                        return ENOMEM;
65
66                action_ptr->irq_handler = &cpu_default_irq_handler;
67                action_ptr->data = (void *) i;
68                arch_cpu_set_irq_entry(cpu, i, action_ptr);
69        }
70
71        return 0;
72}
73
74////////////////////////////////////
75error_t arch_cpu_set_irq_entry(struct cpu_s *cpu, int irq_nr, struct irq_action_s *action)
76{
77        cpu->arch.irq_vector[irq_nr] = action;
78        return 0;
79}
80
81///////////////////////////////////////////
82error_t arch_cpu_get_irq_entry(struct cpu_s *cpu, int irq_nr, struct irq_action_s **action)
83{
84        *action = cpu->arch.irq_vector[irq_nr];
85        return 0;
86}
87
88////////////////////////////////////////////   
89error_t arch_set_power_state(struct cpu_s *cpu, arch_power_state_t state)
90{
91        switch(state)
92        {
93        case ARCH_PWR_IDLE:
94                cpu_power_idle();
95                return 0;
96
97        case ARCH_PWR_SLEEP:
98
99        case ARCH_PWR_SHUTDOWN:
100                printk(WARNING, "WARNING: Unexpected power state (%d) has been asked for CPU %d, of Cluster %d\n", 
101                       state, 
102                       cpu->lid, 
103                       cpu->cluster->id);
104                return 0;
105        default:
106                printk(ERROR, "ERROR: Unknown power state (%d) has been asked for CPU %d, of Cluster %d\n", 
107                       state, 
108                       cpu->lid, 
109                       cpu->cluster->id);
110
111                return EINVAL;
112        }
113}
114
115sint_t arch_barrier_init(struct cluster_s *cluster, struct event_s *event, uint_t count)
116{
117        return soclib_xicu_barrier_init(get_arch_entry(cluster->id)->xicu, event, count);
118}
119
120sint_t arch_barrier_wait(struct cluster_s *cluster, uint_t barrier_id)
121{
122        return soclib_xicu_barrier_wait(get_arch_entry(cluster->id)->xicu, barrier_id);
123}
124
125error_t arch_barrier_destroy(struct cluster_s *cluster, uint_t barrier_id)
126{
127        return soclib_xicu_barrier_destroy(get_arch_entry(cluster->id)->xicu, barrier_id);
128}
129
130/*****************************************************************************************
131 * This function send an IPI (Inter Processor Interrupt) to a core identified by
132 * its cluster identifier and local index. A 32 bits value defining the IPI type
133 * is transmited with the IPI and can be analysed by the associated ISR.
134 *****************************************************************************************
135 * @ cxy      : destination cluster identifier.
136 * @ lid      : destination core local index.
137 * @ type     : to be transmitted in IPI.
138 * @ return 0 if success (IPI registered) / returns EINVAL if illegal cxy or lid.
139 ****************************************************************************************/
140error_t hal_send_ipi( cxy_t    cxy,
141                      lid_t    lid, 
142                      uint32_t type );
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