source: trunk/hal/tsar_mips32/kernel.ld @ 624

Last change on this file since 624 was 624, checked in by alain, 3 years ago

Fix several bugs to use the instruction MMU in kernel mode
in replacement of the instruction address extension register,
and remove the "kentry" segment.

This version is running on the tsar_generic_iob" platform.

One interesting bug: the cp0_ebase defining the kernel entry point
(for interrupts, exceptions and syscalls) must be initialized
early in kernel_init(), because the VFS initialisation done by
kernel_ini() uses RPCs, and RPCs uses Inter-Processor-Interrup.

File size: 1.0 KB
Line 
1/***************************************************************************************
2 * This is the linker script for the ALMOS-MKH kernel code on the TSAR architecture.
3 * It describes the memory layout for the "kernel.elf" binary file, containing the two
4 * loadable segments, that MUST be identity mapped for the TSAR architecture.
5 *
6 * WARNING : the seg_kcode_base defined below must be coherent
7 * with the values defined in the boot_config.h file used by the TSAR bootloader.
8 **************************************************************************************/
9
10/* Define the kernel code base addresses */
11
12seg_kcode_base  = 0x00004000;
13
14/* Define the e_entry field in the "kernel.elf" file header) */
15
16ENTRY(kernel_init)
17
18/* Describe how to group the sections */
19
20SECTIONS
21{
22        . = seg_kcode_base;
23        seg_kcode :
24        {
25                *(.kentry)
26                *(.switch)
27                *(.text)
28                *(.rodata*)
29        }
30
31        . = ALIGN(0x1000);
32
33        seg_kdata :
34        {
35                *(.kinfo)
36                *(.kidle)
37                *(.kdata*)
38        *(.scommon)
39        *(.bss)
40        *(.eh*)
41                *(.data*)
42        }
43}
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