source: trunk/hal/x86_64/core/hal_apic.c @ 82

Last change on this file since 82 was 82, checked in by max@…, 5 years ago

Rename a certain number of things, and improve the APIC support.

File size: 3.0 KB
Line 
1/*
2 * hal_apic.c - Advanced Programmable Interrupt Controller
3 *
4 * Copyright (c) 2017 Maxime Villard
5 *
6 * This file is part of ALMOS-MKH.
7 *
8 * ALMOS-MKH is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2.0 of the License.
11 *
12 * ALMOS-MKH is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with ALMOS-MKH.; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include <hal_types.h>
23#include <hal_register.h>
24#include <hal_segmentation.h>
25#include <hal_apic.h>
26#include <hal_internal.h>
27
28#include <memcpy.h>
29#include <thread.h>
30#include <string.h>
31#include <process.h>
32#include <printk.h>
33#include <vmm.h>
34#include <core.h>
35#include <cluster.h>
36
37/* -------------------------------------------------------------------------- */
38
39#define PIC1_CMD        0x0020
40#define PIC1_DATA       0x0021
41#define PIC2_CMD        0x00a0
42#define PIC2_DATA       0x00a1
43
44static void hal_pic_init()
45{
46        /*
47         * Disable the PIC (8259A). We are going to use IOAPIC instead.
48         */
49        out8(PIC1_DATA, 0xff);
50        out8(PIC2_DATA, 0xff);
51}
52
53/* -------------------------------------------------------------------------- */
54
55paddr_t lapic_pa __in_kdata = 0;
56vaddr_t lapic_va __in_kdata = 0;
57
58void hal_lapic_write(uint32_t reg, uint32_t val)
59{
60        *((volatile uint32_t *)((uint8_t *)lapic_va + reg)) = val;
61}
62
63uint32_t hal_lapic_read(uint32_t reg)
64{
65        return *((volatile uint32_t *)((uint8_t *)lapic_va + reg));
66}
67
68uint32_t hal_lapic_gid()
69{
70        return hal_lapic_read(LAPIC_ID) >> LAPIC_ID_SHIFT;
71}
72
73/*
74 * We have 8 interrupt sources:
75 *  - Spurious
76 *  - APIC Timer (TMR)
77 *  - Local Interrupt 0 (LINT0)
78 *  - Local Interrupt 1 (LINT1)
79 *  - Performance Monitor Counters (PMC)
80 *  - Thermal Sensors (THM)
81 *  - APIC internal error (ERR)
82 *  - Extended (Implementation dependent)
83 */
84static void hal_lapic_init()
85{
86        lapic_va = hal_gpt_bootstrap_valloc(1); // XXX: should be shared
87
88        if ((rdmsr(MSR_APICBASE) & APICBASE_PHYSADDR) != lapic_pa) {
89                x86_panic("APICBASE and ACPI don't match!\n");
90        }
91        wrmsr(MSR_APICBASE, lapic_pa | APICBASE_EN);
92
93        hal_gpt_enter(lapic_va, lapic_pa);
94
95        hal_lapic_write(LAPIC_TPR, 0);
96        hal_lapic_write(LAPIC_EOI, 0);
97        hal_lapic_write(LAPIC_SVR, LAPIC_SVR_ENABLE|LAPIC_SPURIOUS_VECTOR);
98
99        /* Explicitly disable (mask) each vector */
100        hal_lapic_write(LAPIC_LVT_TMR, LAPIC_TMR_M);
101        hal_lapic_write(LAPIC_LVT_LINT0, LAPIC_LINT_M);
102        hal_lapic_write(LAPIC_LVT_LINT1, LAPIC_LINT_M);
103        hal_lapic_write(LAPIC_LVT_PMC, LAPIC_PMC_M);
104        hal_lapic_write(LAPIC_LVT_THM, LAPIC_THM_M);
105        hal_lapic_write(LAPIC_LVT_ERR, LAPIC_ERR_M);
106}
107
108/* -------------------------------------------------------------------------- */
109
110void hal_apic_init()
111{
112        /* Disable the PIC */
113        hal_pic_init();
114
115        /* Enable the LAPIC */
116        hal_lapic_init();
117}
118
Note: See TracBrowser for help on using the repository browser.