source: trunk/hal/x86_64/core/hal_boot.S @ 234

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1/*
2 * hal_boot.S - Kernel boot entry point
3 *
4 * Copyright (c) 2017 Maxime Villard
5 * This code is inspired a lot from the NetBSD boot procedure, written by
6 * Maxime Villard too. XXX copyright
7 *
8 * This file is part of ALMOS-MKH.
9 *
10 * ALMOS-MKH is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2.0 of the License.
13 *
14 * ALMOS-MKH is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with ALMOS-MKH; if not, write to the Free Software Foundation,
21 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#define x86_ASM
25#include <hal_boot.h>
26#include <hal_multiboot.h>
27#include <hal_register.h>
28#include <hal_kentry.h>
29#include <hal_segmentation.h>
30
31#define MULTIBOOT_HEADER_MAGIC  0x1BADB002
32#define MULTIBOOT_HEADER_FLAGS  0x00000000
33#define MULTIBOOT_INFO_MAGIC    0x2BADB002
34#define CHECKSUM -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
35
36#if L2_SLOT_KERNBASE > 0
37#define TABLE_L2_ENTRIES (2 * (NKL2_KIMG_ENTRIES + 1))
38#else
39#define TABLE_L2_ENTRIES (NKL2_KIMG_ENTRIES + 1)
40#endif
41
42#if L3_SLOT_KERNBASE > 0
43#define TABLE_L3_ENTRIES (2 * NKL3_KIMG_ENTRIES)
44#else
45#define TABLE_L3_ENTRIES NKL3_KIMG_ENTRIES
46#endif
47
48#define PROC0_PML4_OFF  0
49#define PROC0_STK_OFF   (PROC0_PML4_OFF + 1 * PAGE_SIZE)
50#define PROC0_PTP3_OFF  (PROC0_STK_OFF + STKPAGES * PAGE_SIZE)
51#define PROC0_PTP2_OFF  (PROC0_PTP3_OFF + NKL4_KIMG_ENTRIES * PAGE_SIZE)
52#define PROC0_PTP1_OFF  (PROC0_PTP2_OFF + TABLE_L3_ENTRIES * PAGE_SIZE)
53#define TABLESIZE \
54  ((NKL4_KIMG_ENTRIES + TABLE_L3_ENTRIES + TABLE_L2_ENTRIES + 1 + STKPAGES) \
55    * PAGE_SIZE)
56
57/*
58 * fillkpt - Fill in a kernel page table
59 *      eax = pte (page frame | control | status)
60 *      ebx = page table address
61 *      ecx = number of pages to map
62 *
63 * Each entry is 8 (PDE_SIZE) bytes long: we must set the 4 upper bytes to 0.
64 */
65#define fillkpt \
66        cmpl    $0,%ecx                 ;       /* zero-sized? */       \
67        je      2f                      ; \
681:      movl    $0,(PDE_SIZE-4)(%ebx)   ;       /* upper 32 bits: 0 */  \
69        movl    %eax,(%ebx)             ;       /* store phys addr */   \
70        addl    $PDE_SIZE,%ebx          ;       /* next PTE/PDE */      \
71        addl    $PAGE_SIZE,%eax         ;       /* next phys page */    \
72        loop    1b                      ; \
732:                                      ;
74
75/*
76 * fillkpt_nox - Same as fillkpt, but sets the NX/XD bit.
77 */
78#define fillkpt_nox \
79        cmpl    $0,%ecx                 ;       /* zero-sized? */       \
80        je      2f                      ; \
811:      movl    $PG_NX32,(PDE_SIZE-4)(%ebx);    /* upper 32 bits: NX */ \
82        movl    %eax,(%ebx)             ;       /* store phys addr */   \
83        addl    $PDE_SIZE,%ebx          ;       /* next PTE/PDE */      \
84        addl    $PAGE_SIZE,%eax         ;       /* next phys page */    \
85        loop    1b                      ; \
862:                                      ;
87
88/*
89 * fillkpt_blank - Fill in a kernel page table with blank entries
90 *      ebx = page table address
91 *      ecx = number of pages to map
92 */
93#define fillkpt_blank   \
94        cmpl    $0,%ecx                 ;       /* zero-sized? */       \
95        je      2f                      ; \
961:      movl    $0,(PDE_SIZE-4)(%ebx)   ;       /* upper 32 bits: 0 */  \
97        movl    $0,(%ebx)               ;       /* lower 32 bits: 0 */  \
98        addl    $PDE_SIZE,%ebx          ;       /* next PTE/PDE */      \
99        loop    1b                      ; \
1002:                                      ;
101
102/*
103 * killkpt - Destroy a kernel page table (long mode)
104 *      rbx = page table address
105 *      rcx = number of pages to destroy
106 */
107#define killkpt \
1081:      movq    $0,(%rbx)       ; \
109        addq    $PDE_SIZE,%rbx  ; \
110        loop    1b              ;
111
112/* 32bit version of PG_NX */
113#define PG_NX32 0x80000000
114
115#define RELOC(x)        ((x) - KERNBASE)
116
117        .globl  start_x86_64
118        .globl  L4paddr
119        .globl  iom_base
120
121/*
122 * The multiboot header
123 */
124        .section .boot,"ax",@progbits
125multiboot_header:
126        .align  4
127        .long   MULTIBOOT_HEADER_MAGIC
128        .long   MULTIBOOT_HEADER_FLAGS
129        .long   CHECKSUM
130
131/*
132 * The variables used in the boot procedure.
133 */
134        .section .data
135        .align  4
136
137        .type   L4paddr, @object
138        L4paddr:        .quad   0       /* paddr of L4 */
139
140        .type   iom_base, @object
141        iom_base:       .quad   0       /* virt. addr. of ISA I/O MEM */
142
143
144#define GDT64_LIMIT gdt64_end-gdt64_start-1
145/* Temporary gdt64, with base address in low memory */
146        .type   gdt64_lo, @object
147gdt64_lo:
148        .word   GDT64_LIMIT
149        .quad   RELOC(gdt64_start)
150.align 64
151
152/* Temporary gdt64, with base address in high memory */
153        .type   gdt64_hi, @object
154gdt64_hi:
155        .word   GDT64_LIMIT
156        .quad   gdt64_start
157.align 64
158#undef GDT64_LIMIT
159
160        .type   gdt64_start, @object
161gdt64_start:
162        .quad 0x0000000000000000        /* always empty */
163        .quad 0x00af9a000000ffff        /* kernel CS */
164        .quad 0x00cf92000000ffff        /* kernel DS */
165gdt64_end:
166
167        .type   farjmp64, @object
168farjmp64:
169        .long   RELOC(longmode)
170        .word   GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL)
171.align 64
172
173        /* Space for the temporary stack */
174        .size   tmpstk, tmpstk - .
175        .space  512
176tmpstk:
177
178        .text
179
180start_x86_64:
181        .code32
182
183        /* Warm boot */
184        movw    $0x1234,0x472
185        cld
186
187        /* Make sure it is a multiboot-compliant bootloader. */
188        cmpl    $MULTIBOOT_INFO_MAGIC,%eax
189        je      1f
190        ret     /* what to do? */
1911:
192
193        movl    $RELOC(tmpstk),%esp
194
195        /* Reset the PSL. */
196        pushl   $PSL_MBO
197        popfl
198
199        /*
200         * Copy the various multiboot structures
201         */
202        movl    %ebx,%esi                       /* src */
203        movl    $RELOC(mb_info),%edi            /* dst */
204        movl    $MULTIBOOT_INFO_SIZE,%ecx       /* len */
205        rep
206        movsb   /* copy esi -> edi */
207
208        testl   $MULTIBOOT_INFO_HAS_LOADER_NAME,MB_MI_FLAGS(%ebx)
209        jz      1f
210        movl    MB_MI_LOADER_NAME(%ebx),%esi    /* src */
211        movl    $RELOC(mb_loader_name),%edi     /* dst */
212copy_loop:
213        cmpb    $0,(%esi)
214        je      copy_end
215        movsb   /* copy esi -> edi */
216        jmp     copy_loop
217copy_end:
218        movsb   /* copy esi -> edi */
2191:
220
221        testl   $MULTIBOOT_INFO_HAS_MMAP,MB_MI_FLAGS(%ebx)
222        jz      1f
223        movl    MB_MI_MMAP_ADDR(%ebx),%esi      /* src */
224        movl    $RELOC(mb_mmap),%edi            /* dst */
225        movl    MB_MI_MMAP_LENGTH(%ebx),%ecx    /* len */
226
227        rep
228        movsb   /* copy esi -> edi */
2291:
230
231/*
232 * There are four levels of pages in amd64: PML4 -> PDP -> PD -> PT. They will
233 * be referred to as: L4 -> L3 -> L2 -> L1.
234 *
235 * Virtual address space of the kernel:
236 * +---------------+------+-----------------------------------+-------------+
237 * | TEXT + RODATA | DATA | L4 -> PROC0 STK -> L3 -> L2 -> L1 | ISA I/O MEM |
238 * +---------------+------+-----------------------------------+-------------+
239 *                       (1)                                 (2)
240 *
241 * PROC0 STK is obviously not linked as a page level. It just happens to be
242 * caught between L4 and L3.
243 *
244 * (PROC0 STK + L4 + L3 + L2 + L1) is later referred to as BOOTSTRAP TABLES.
245 *
246 * ISA I/O MEM has no physical page allocated here, just virtual addresses.
247 *
248 * Important note: the kernel segments are properly 4k-aligned
249 * (see kernel_x86.ld), so there's no need to enforce alignment.
250 */
251
252        /* Find end of kernel image; brings us on (1). */
253        movl    $RELOC(__kernel_end),%edi
254
255        /* Align up for BOOTSTRAP TABLES. */
256        movl    %edi,%esi
257        addl    $PGOFSET,%esi
258        andl    $~PGOFSET,%esi
259
260        /* We are on the BOOTSTRAP TABLES. Save L4's physical address. */
261        movl    $RELOC(L4paddr),%ebp
262        movl    %esi,(%ebp)
263        movl    $0,4(%ebp)
264
265        /* Now, zero out the BOOTSTRAP TABLES (before filling them in). */
266        movl    %esi,%edi
267        xorl    %eax,%eax
268        cld
269        movl    $TABLESIZE,%ecx
270        shrl    $2,%ecx
271        rep
272        stosl                           /* copy eax -> edi */
273
274/*
275 * Build the page tables and levels. We go from L1 to L4, and link the levels
276 * together. Note: RELOC computes &addr - KERNBASE in 32 bits; the value can't
277 * be > 4G, or we can't deal with it anyway, since we are in 32bit mode.
278 */
279        /*
280         * Build L1.
281         */
282        leal    (PROC0_PTP1_OFF)(%esi),%ebx
283
284        /* Skip the area below the kernel text. */
285        movl    $(KERNTEXTOFF_LO - KERNBASE_LO),%ecx
286        shrl    $PGSHIFT,%ecx
287        fillkpt_blank
288
289        /* Map the kernel code RX. */
290        movl    $(KERNTEXTOFF_LO - KERNBASE_LO),%eax    /* start of TEXT */
291        movl    $RELOC(__kernel_data_start),%ecx
292        subl    %eax,%ecx
293        shrl    $PGSHIFT,%ecx
294        orl     $(PG_V|PG_KR|PG_G),%eax
295        fillkpt
296
297        /* Map the kernel data RW. */
298        movl    $RELOC(__kernel_data_start),%eax
299        movl    $RELOC(__kernel_end),%ecx
300        subl    %eax,%ecx
301        shrl    $PGSHIFT,%ecx
302        orl     $(PG_V|PG_KW|PG_G),%eax
303        fillkpt_nox
304
305        /* Map the BOOTSTRAP TABLES RW. */
306        movl    $RELOC(__kernel_end),%eax               /* start of BOOTSTRAP TABLES */
307        movl    $TABLESIZE,%ecx         /* length of BOOTSTRAP TABLES */
308        shrl    $PGSHIFT,%ecx
309        orl     $(PG_V|PG_KW|PG_G),%eax
310        fillkpt_nox
311
312        /* We are on (2). Map ISA I/O MEM RW. */
313        movl    $IOM_BEGIN,%eax
314        movl    $IOM_SIZE,%ecx  /* size of ISA I/O MEM */
315        shrl    $PGSHIFT,%ecx
316        orl     $(PG_V|PG_KW|PG_G),%eax
317        fillkpt_nox
318
319        /*
320         * Build L2. Linked to L1.
321         */
322        leal    (PROC0_PTP2_OFF)(%esi),%ebx
323        leal    (PROC0_PTP1_OFF)(%esi),%eax
324        orl     $(PG_V|PG_KW),%eax
325        movl    $(NKL2_KIMG_ENTRIES+1),%ecx
326        fillkpt
327
328#if L2_SLOT_KERNBASE > 0
329        /* If needed, set up level 2 entries for actual kernel mapping */
330        leal    (PROC0_PTP2_OFF + L2_SLOT_KERNBASE * PDE_SIZE)(%esi),%ebx
331        leal    (PROC0_PTP1_OFF)(%esi),%eax
332        orl     $(PG_V|PG_KW),%eax
333        movl    $(NKL2_KIMG_ENTRIES+1),%ecx
334        fillkpt
335#endif
336
337        /*
338         * Build L3. Linked to L2.
339         */
340        leal    (PROC0_PTP3_OFF)(%esi),%ebx
341        leal    (PROC0_PTP2_OFF)(%esi),%eax
342        orl     $(PG_V|PG_KW),%eax
343        movl    $NKL3_KIMG_ENTRIES,%ecx
344        fillkpt
345
346#if L3_SLOT_KERNBASE > 0
347        /* If needed, set up level 3 entries for actual kernel mapping */
348        leal    (PROC0_PTP3_OFF + L3_SLOT_KERNBASE * PDE_SIZE)(%esi),%ebx
349        leal    (PROC0_PTP2_OFF)(%esi),%eax
350        orl     $(PG_V|PG_KW),%eax
351        movl    $NKL3_KIMG_ENTRIES,%ecx
352        fillkpt
353#endif
354
355        /*
356         * Build L4 for identity mapping. Linked to L3.
357         */
358        leal    (PROC0_PML4_OFF)(%esi),%ebx
359        leal    (PROC0_PTP3_OFF)(%esi),%eax
360        orl     $(PG_V|PG_KW),%eax
361        movl    $NKL4_KIMG_ENTRIES,%ecx
362        fillkpt
363
364        /* Set up L4 entries for actual kernel mapping */
365        leal    (PROC0_PML4_OFF + L4_SLOT_KERNBASE * PDE_SIZE)(%esi),%ebx
366        leal    (PROC0_PTP3_OFF)(%esi),%eax
367        orl     $(PG_V|PG_KW),%eax
368        movl    $NKL4_KIMG_ENTRIES,%ecx
369        fillkpt
370
371        /* Install recursive top level PDE (one entry) */
372        leal    (PROC0_PML4_OFF + PDIR_SLOT_PTE * PDE_SIZE)(%esi),%ebx
373        leal    (PROC0_PML4_OFF)(%esi),%eax
374        orl     $(PG_V|PG_KW),%eax
375        movl    $1,%ecx
376        fillkpt_nox
377
378        /*
379         * Startup checklist:
380         * 1. Enable PAE (and SSE while here).
381         */
382        movl    %cr4,%eax
383        orl     $(CR4_PAE|CR4_OSFXSR|CR4_OSXMMEXCPT|CR4_PGE),%eax
384        movl    %eax,%cr4
385
386        /*
387         * 2. Set Long Mode Enable in EFER. Also enable the syscall extensions,
388         *    and NOX.
389         */
390        movl    $MSR_EFER,%ecx
391        rdmsr
392        xorl    %eax,%eax       /* XXX */
393        orl     $(EFER_LME|EFER_SCE|EFER_NXE),%eax
394        wrmsr
395
396        /*
397         * 3. Load %cr3 with pointer to PML4.
398         */
399        movl    %esi,%eax
400        movl    %eax,%cr3
401
402        /*
403         * 4. Enable paging and the rest of it.
404         */
405        movl    %cr0,%eax
406        orl     $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_MP|CR0_WP|CR0_AM),%eax
407        movl    %eax,%cr0
408        jmp     compat
409compat:
410
411        /*
412         * 5. Not quite done yet, we're now in a compatibility segment, in
413         *    legacy mode. We must jump to a long mode segment. Need to set up
414         *    a temporary GDT with a long mode segment in it to do that.
415         */
416        movl    $RELOC(gdt64_lo),%eax
417        lgdt    (%eax)
418        movl    $RELOC(farjmp64),%eax
419        ljmp    *(%eax)
420
421        .code64
422longmode:
423        /*
424         * 6. Finally, we're in long mode. However, we're still in the identity
425         *    mapped area (could not jump out of that earlier because it would
426         *    have been a > 32bit jump). We can do that now, so here we go.
427         */
428        movabsq $longmode_hi,%rax
429        jmp     *%rax
430
431longmode_hi:
432        /*
433         * We left the identity mapped area. Base address of
434         * the temporary gdt64 should now be in high memory.
435         */
436        movq    $RELOC(gdt64_hi),%rax
437        lgdt    (%rax)
438
439        /*
440         * We have arrived. There's no need anymore for the identity mapping in
441         * low memory, remove it.
442         */
443        movq    $KERNBASE,%r8
444
445#if L2_SLOT_KERNBASE > 0
446        movq    $(NKL2_KIMG_ENTRIES+1),%rcx
447        leaq    (PROC0_PTP2_OFF)(%rsi),%rbx     /* old, phys address */
448        addq    %r8,%rbx                        /* new, virt address */
449        killkpt
450#endif
451
452#if L3_SLOT_KERNBASE > 0
453        movq    $NKL3_KIMG_ENTRIES,%rcx
454        leaq    (PROC0_PTP3_OFF)(%rsi),%rbx     /* old, phys address */
455        addq    %r8,%rbx                        /* new, virt address */
456        killkpt
457#endif
458
459        movq    $NKL4_KIMG_ENTRIES,%rcx
460        leaq    (PROC0_PML4_OFF)(%rsi),%rbx     /* old, phys address of PML4 */
461        addq    %r8,%rbx                        /* new, virt address of PML4 */
462        killkpt
463
464        /* Save the virtual address of ISA I/O MEM. */
465        movq    $(TABLESIZE+KERNBASE),%rdx
466        addq    %rsi,%rdx
467        movq    %rdx,iom_base(%rip)
468
469        /* Set up bootstrap stack. */
470        leaq    (PROC0_STK_OFF)(%rsi),%rax
471        addq    %r8,%rax
472        leaq    (STKSIZE)(%rax),%rsp
473        xorq    %rbp,%rbp                       /* mark end of frames */
474
475        xorw    %ax,%ax
476        movw    %ax,%gs
477        movw    %ax,%fs
478
479        /* The first physical page available. */
480        leaq    (TABLESIZE)(%rsi),%rdi
481
482        call    init_x86_64
483
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