source: trunk/hal/x86_64/core/hal_special.c @ 102

Last change on this file since 102 was 102, checked in by max@…, 7 years ago

update the new hal_get_cycles

File size: 3.1 KB
RevLine 
[25]1/*
[46]2 * hal_special.c - implementation of TLS API for x86_64
[71]3 *
[46]4 * Copyright (c) 2017 Maxime Villard
[71]5 *
[46]6 * This file is part of ALMOS-MKH.
[25]7 *
[46]8 * ALMOS-MKH is free software; you can redistribute it and/or modify it
[25]9 * under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2.0 of the License.
11 *
[46]12 * ALMOS-MKH is distributed in the hope that it will be useful, but
[25]13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with ALMOS-MKH.; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include <hal_types.h>
[82]23#include <hal_apic.h>
[25]24#include <hal_special.h>
[46]25#include <hal_register.h>
26#include <hal_internal.h>
[25]27
[102]28#include <core.h>
29#include <thread.h>
30
[25]31struct thread_s;
32
[46]33typedef struct cpu_info {
34        void *ci_self;
35        uint32_t ci_gid;
36        uint32_t ci_lid;
37        struct thread_s *ci_thr;
38} cpu_info_t;
39
40cpu_info_t cpu0 __in_kdata;
41
42cpu_info_t *curcpu()
43{
44        cpu_info_t *ci;
45
46        __asm volatile("movq %%gs:%1, %0" :
47            "=r" (ci) :
48            "m"
49            (*(cpu_info_t * const *)offsetof(cpu_info_t, ci_self)));
50        return ci;
51}
52
53static void hal_tls_load_cpu(cpu_info_t *ci)
54{
55        wrmsr(MSR_FSBASE, 0);
56        wrmsr(MSR_GSBASE, (uint64_t)ci);
57        wrmsr(MSR_KERNELGSBASE, 0);
58}
59
60void hal_tls_init_cpu0()
61{
62        cpu_info_t *ci = &cpu0;
63
64        memset(ci, 0, sizeof(cpu_info_t));
65
66        ci->ci_self = ci;
67        ci->ci_gid = hal_lapic_gid();
68        ci->ci_lid = 0; /* XXX */
69
70        hal_tls_load_cpu(ci);
71}
72
[25]73gid_t hal_get_gid()
74{
[46]75        return curcpu()->ci_gid;
[25]76}
77
[102]78uint64_t hal_get_cycles()
[25]79{
[102]80        uint64_t cycles;
81        core_t *core = CURRENT_THREAD->core;
82
83        /*
84         * Put the value of the TSC everywhere
85         */
86        cycles = rdtsc();
87        core->time_stamp = cycles;
88        core->cycles = cycles;
89
90        return cycles;
[25]91}
92
[102]93struct thread_s *hal_get_current_thread()
[25]94{
[46]95        return curcpu()->ci_thr;
[25]96}
97
98void hal_set_current_thread( struct thread_s * thread )
[71]99{
[46]100        curcpu()->ci_thr = thread;
[25]101}
102
[46]103/* -------------------------------------------------------------------------- */
104
[25]105void hal_fpu_enable()
106{
[46]107        x86_panic((char *)__func__);
[25]108}
109
110void hal_fpu_disable()
111{
[46]112        x86_panic((char *)__func__);
[25]113}
114
115uint32_t hal_get_stack()
116{
[46]117        x86_panic((char *)__func__);
[25]118        return 0;
119}
120
121uint32_t hal_set_stack( void * new_val )
122{
[46]123        x86_panic((char *)__func__);
[25]124        return 0;
125}
126
127uint32_t hal_get_bad_vaddr()
128{
[46]129        x86_panic((char *)__func__);
[25]130        return 0;
131}
132
133uint32_t hal_uncached_read( uint32_t * ptr )
134{
[46]135        x86_panic((char *)__func__);
[25]136        return 0;
137}
138
139void hal_invalid_dcache_line( void * ptr )
140{
[46]141        x86_panic((char *)__func__);
[25]142}
143
144void hal_wbflush()
145{
[46]146        x86_panic((char *)__func__);
[25]147}
148
149void hal_rdbar()
150{
[46]151        x86_panic((char *)__func__);
[25]152}
153
154void hal_core_sleep()
155{
[46]156        x86_panic((char *)__func__);
[25]157}
158
159void hal_fixed_delay( uint32_t delay )
[71]160{
[46]161        x86_panic((char *)__func__);
[25]162}
163
164void hal_get_mmu_excp( intptr_t * mmu_ins_excp_code,
165                       intptr_t * mmu_ins_bad_vaddr,
166                       intptr_t * mmu_dat_excp_code,
167                       intptr_t * mmu_dat_bad_vaddr )
168{
[46]169        x86_panic((char *)__func__);
[25]170}
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