source: trunk/hal/x86_64/core/hal_special.c @ 82

Last change on this file since 82 was 82, checked in by max@…, 7 years ago

Rename a certain number of things, and improve the APIC support.

File size: 2.9 KB
RevLine 
[25]1/*
[46]2 * hal_special.c - implementation of TLS API for x86_64
[71]3 *
[46]4 * Copyright (c) 2017 Maxime Villard
[71]5 *
[46]6 * This file is part of ALMOS-MKH.
[25]7 *
[46]8 * ALMOS-MKH is free software; you can redistribute it and/or modify it
[25]9 * under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2.0 of the License.
11 *
[46]12 * ALMOS-MKH is distributed in the hope that it will be useful, but
[25]13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with ALMOS-MKH.; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include <hal_types.h>
[82]23#include <hal_apic.h>
[25]24#include <hal_special.h>
[46]25#include <hal_register.h>
26#include <hal_internal.h>
[25]27
28struct thread_s;
29
[46]30typedef struct cpu_info {
31        void *ci_self;
32        uint32_t ci_gid;
33        uint32_t ci_lid;
34        struct thread_s *ci_thr;
35} cpu_info_t;
36
37cpu_info_t cpu0 __in_kdata;
38
39cpu_info_t *curcpu()
40{
41        cpu_info_t *ci;
42
43        __asm volatile("movq %%gs:%1, %0" :
44            "=r" (ci) :
45            "m"
46            (*(cpu_info_t * const *)offsetof(cpu_info_t, ci_self)));
47        return ci;
48}
49
50static void hal_tls_load_cpu(cpu_info_t *ci)
51{
52        wrmsr(MSR_FSBASE, 0);
53        wrmsr(MSR_GSBASE, (uint64_t)ci);
54        wrmsr(MSR_KERNELGSBASE, 0);
55}
56
57void hal_tls_init_cpu0()
58{
59        cpu_info_t *ci = &cpu0;
60
61        memset(ci, 0, sizeof(cpu_info_t));
62
63        ci->ci_self = ci;
64        ci->ci_gid = hal_lapic_gid();
65        ci->ci_lid = 0; /* XXX */
66
67        hal_tls_load_cpu(ci);
68}
69
[25]70gid_t hal_get_gid()
71{
[46]72        return curcpu()->ci_gid;
[25]73}
74
75uint32_t hal_time_stamp()
76{
[46]77        x86_panic((char *)__func__);
[25]78        return 0;
79}
80
81struct thread_s * hal_get_current_thread()
82{
[46]83        x86_panic((char *)__func__);
84        return curcpu()->ci_thr;
[25]85}
86
87void hal_set_current_thread( struct thread_s * thread )
[71]88{
[46]89        curcpu()->ci_thr = thread;
[25]90}
91
[46]92/* -------------------------------------------------------------------------- */
93
[25]94void hal_fpu_enable()
95{
[46]96        x86_panic((char *)__func__);
[25]97}
98
99void hal_fpu_disable()
100{
[46]101        x86_panic((char *)__func__);
[25]102}
103
104uint32_t hal_get_stack()
105{
[46]106        x86_panic((char *)__func__);
[25]107        return 0;
108}
109
110uint32_t hal_set_stack( void * new_val )
111{
[46]112        x86_panic((char *)__func__);
[25]113        return 0;
114}
115
116uint32_t hal_get_bad_vaddr()
117{
[46]118        x86_panic((char *)__func__);
[25]119        return 0;
120}
121
122uint32_t hal_uncached_read( uint32_t * ptr )
123{
[46]124        x86_panic((char *)__func__);
[25]125        return 0;
126}
127
128void hal_invalid_dcache_line( void * ptr )
129{
[46]130        x86_panic((char *)__func__);
[25]131}
132
133void hal_wbflush()
134{
[46]135        x86_panic((char *)__func__);
[25]136}
137
138void hal_rdbar()
139{
[46]140        x86_panic((char *)__func__);
[25]141}
142
143void hal_core_sleep()
144{
[46]145        x86_panic((char *)__func__);
[25]146}
147
148void hal_fixed_delay( uint32_t delay )
[71]149{
[46]150        x86_panic((char *)__func__);
[25]151}
152
153void hal_get_mmu_excp( intptr_t * mmu_ins_excp_code,
154                       intptr_t * mmu_ins_bad_vaddr,
155                       intptr_t * mmu_dat_excp_code,
156                       intptr_t * mmu_dat_bad_vaddr )
157{
[46]158        x86_panic((char *)__func__);
[25]159}
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