source: trunk/hal/x86_64/core/hal_special.c @ 70

Last change on this file since 70 was 70, checked in by max@…, 5 years ago

start constructing the bootinfo structure

File size: 3.0 KB
Line 
1/*
2 * hal_special.c - implementation of TLS API for x86_64
3 *
4 * Copyright (c) 2017 Maxime Villard
5 *
6 * This file is part of ALMOS-MKH.
7 *
8 * ALMOS-MKH is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2.0 of the License.
11 *
12 * ALMOS-MKH is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with ALMOS-MKH.; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include <hal_types.h>
23#include <hal_lapic.h>
24#include <hal_special.h>
25#include <hal_register.h>
26#include <hal_internal.h>
27
28struct thread_s;
29
30typedef struct cpu_info {
31        void *ci_self;
32        uint32_t ci_gid;
33        uint32_t ci_lid;
34        struct thread_s *ci_thr;
35} cpu_info_t;
36
37cpu_info_t cpu0 __in_kdata;
38
39cpu_info_t *curcpu()
40{
41        cpu_info_t *ci;
42
43        __asm volatile("movq %%gs:%1, %0" :
44            "=r" (ci) :
45            "m"
46            (*(cpu_info_t * const *)offsetof(cpu_info_t, ci_self)));
47        return ci;
48}
49
50static void hal_tls_load_cpu(cpu_info_t *ci)
51{
52        wrmsr(MSR_FSBASE, 0);
53        wrmsr(MSR_GSBASE, (uint64_t)ci);
54        wrmsr(MSR_KERNELGSBASE, 0);
55}
56
57void hal_tls_init_cpu0()
58{
59        cpu_info_t *ci = &cpu0;
60
61        memset(ci, 0, sizeof(cpu_info_t));
62
63        ci->ci_self = ci;
64        ci->ci_gid = hal_lapic_gid();
65        ci->ci_lid = 0; /* XXX */
66
67        hal_tls_load_cpu(ci);
68}
69
70gid_t hal_get_gid()
71{
72        return curcpu()->ci_gid;
73}
74
75uint32_t hal_time_stamp()
76{
77        x86_panic((char *)__func__);
78        return 0;
79}
80
81struct thread_s * hal_get_current_thread()
82{
83        x86_panic((char *)__func__);
84        return curcpu()->ci_thr;
85}
86
87void hal_set_current_thread( struct thread_s * thread )
88{ 
89        x86_panic((char *)__func__);
90        curcpu()->ci_thr = thread;
91}
92
93/* -------------------------------------------------------------------------- */
94
95void hal_fpu_enable()
96{
97        x86_panic((char *)__func__);
98}
99
100void hal_fpu_disable()
101{
102        x86_panic((char *)__func__);
103}
104
105uint32_t hal_get_stack()
106{
107        x86_panic((char *)__func__);
108        return 0;
109}
110
111uint32_t hal_set_stack( void * new_val )
112{
113        x86_panic((char *)__func__);
114        return 0;
115}
116
117uint32_t hal_get_bad_vaddr()
118{
119        x86_panic((char *)__func__);
120        return 0;
121}
122
123uint32_t hal_uncached_read( uint32_t * ptr )
124{
125        x86_panic((char *)__func__);
126        return 0;
127}
128
129void hal_invalid_dcache_line( void * ptr )
130{
131        x86_panic((char *)__func__);
132}
133
134void hal_wbflush()
135{
136        x86_panic((char *)__func__);
137}
138
139void hal_rdbar()
140{
141        x86_panic((char *)__func__);
142}
143
144void hal_core_sleep()
145{
146        x86_panic((char *)__func__);
147}
148
149void hal_fixed_delay( uint32_t delay )
150{ 
151        x86_panic((char *)__func__);
152}
153
154void hal_get_mmu_excp( intptr_t * mmu_ins_excp_code,
155                       intptr_t * mmu_ins_bad_vaddr,
156                       intptr_t * mmu_dat_excp_code,
157                       intptr_t * mmu_dat_bad_vaddr )
158{
159        x86_panic((char *)__func__);
160}
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