source: trunk/hal/x86_64/drivers/soclib_xcu.c @ 137

Last change on this file since 137 was 137, checked in by max@…, 7 years ago

improve the APIC implementation

File size: 2.9 KB
RevLine 
[75]1/*
2 * soclib_xcu.c - soclib XCU driver API implementation.
3 *
4 * Authors  Alain Greiner    (2016)
5 *
6 * Copyright (c) UPMC Sorbonne Universites
7 *
8 * This file is part of ALMOS-MKH.
9 *
10 * ALMOS-MKH.is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2.0 of the License.
13 *
14 * ALMOS-MKH.is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with ALMOS-kernel; if not, write to the Free Software Foundation,
21 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#include <soclib_xcu.h>
25#include <hal_types.h>
26#include <core.h>
27#include <chdev.h>
28
[135]29#include <hal_apic.h>
[129]30#include <hal_internal.h>
31
[135]32extern size_t ioapic_pins;
33
[137]34uint64_t apic_fake_status __in_kdata = 0;
35
36/*
37 * These indexes are used to translate a type::idx to a pin on the IOAPIC.
38 */
39uint32_t hwi_baseidx __in_kdata = 0;
40uint32_t wti_baseidx __in_kdata = 0;
41uint32_t pti_baseidx __in_kdata = 0;
42
[135]43void soclib_xcu_init(chdev_t *icu, lid_t lid)
[75]44{
[135]45        size_t i;
46
47        /* disable all IRQs */
48        for (i = 0; i < ioapic_pins; i++) {
[137]49                hal_ioapic_disable_entry(i);
[135]50        }
51
[129]52        x86_panic((char *)__func__);
[75]53}
54
[137]55void soclib_xcu_enable_irq(chdev_t *icu, uint32_t idx, uint32_t type,
56    lid_t lid)
[75]57{
[137]58        uint32_t pin;
59
60        switch (type) {
61                case HWI_TYPE:
62                        pin = hwi_baseidx + idx;
63                case WTI_TYPE:
64                        pin = wti_baseidx + idx;
65                case PTI_TYPE:
66                        pin = pti_baseidx + idx;
67                default:
68                        x86_panic("enabling wrong irq");
69        }
70
[129]71        x86_panic((char *)__func__);
[75]72}
73
[137]74void soclib_xcu_disable_irq(chdev_t *icu, uint32_t idx, uint32_t type,
75    lid_t lid)
[75]76{
[129]77        x86_panic((char *)__func__);
[75]78}
79
80void soclib_xcu_get_masks( chdev_t   * icu,
81                           lid_t       lid,
82                           uint32_t  * hwi_mask,
83                           uint32_t  * wti_mask,
84                           uint32_t  * pti_mask )
85{
[129]86        x86_panic((char *)__func__);
[75]87}
88
89void soclib_xcu_set_period( chdev_t * icu,
90                            uint32_t  index,
91                            uint32_t  period )
92{
[129]93        x86_panic((char *)__func__);
[75]94}
95
96uint32_t soclib_xcu_ack_timer( chdev_t * icu,
97                               uint32_t  index )
98{
[129]99        x86_panic((char *)__func__);
[81]100        return 0;
[75]101}
102
[137]103
104
105
106
107void soclib_xcu_get_status(chdev_t *icu, lid_t lid, uint32_t *hwi_status,
108    uint32_t *wti_status, uint32_t *pti_status)
[75]109{
[137]110        if (lid != 0) {
111                x86_panic("xcu_get_status should have lid==0");
112        }
113
[129]114        x86_panic((char *)__func__);
[75]115}
116
[137]117
118
119
120
121
[75]122void soclib_xcu_send_ipi( xptr_t  icu_xp,
123                          lid_t   lid )
124{
[129]125        x86_panic((char *)__func__);
[75]126}
127
128uint32_t * soclib_xcu_wti_ptr( chdev_t  * icu,
129                               uint32_t   index )
130{
[129]131        x86_panic((char *)__func__);
[81]132        return NULL;
[75]133}
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