source: trunk/hal/x86_64/hal_special.c @ 50

Last change on this file since 50 was 46, checked in by max@…, 7 years ago

Start implementing TLS.

File size: 3.0 KB
Line 
1/*
2 * hal_special.c - implementation of TLS API for x86_64
3 *
4 * Copyright (c) 2017 Maxime Villard
5 *
6 * This file is part of ALMOS-MKH.
7 *
8 * ALMOS-MKH is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2.0 of the License.
11 *
12 * ALMOS-MKH is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with ALMOS-MKH.; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include <hal_types.h>
23#include <hal_lapic.h>
24#include <hal_special.h>
25#include <hal_register.h>
26#include <hal_internal.h>
27
28struct thread_s;
29
30typedef struct cpu_info {
31        void *ci_self;
32        uint32_t ci_gid;
33        uint32_t ci_lid;
34        struct thread_s *ci_thr;
35} cpu_info_t;
36
37cpu_info_t cpu0 __in_kdata;
38
39cpu_info_t *curcpu()
40{
41        cpu_info_t *ci;
42
43        __asm volatile("movq %%gs:%1, %0" :
44            "=r" (ci) :
45            "m"
46            (*(cpu_info_t * const *)offsetof(cpu_info_t, ci_self)));
47        return ci;
48}
49
50static void hal_tls_load_cpu(cpu_info_t *ci)
51{
52        wrmsr(MSR_FSBASE, 0);
53        wrmsr(MSR_GSBASE, (uint64_t)ci);
54        wrmsr(MSR_KERNELGSBASE, 0);
55}
56
57void hal_tls_init_cpu0()
58{
59        cpu_info_t *ci = &cpu0;
60
61        memset(ci, 0, sizeof(cpu_info_t));
62
63        ci->ci_self = ci;
64        ci->ci_gid = hal_lapic_gid();
65        ci->ci_lid = 0; /* XXX */
66
67        hal_tls_load_cpu(ci);
68}
69
70gid_t hal_get_gid()
71{
72        x86_panic((char *)__func__);
73        return curcpu()->ci_gid;
74}
75
76uint32_t hal_time_stamp()
77{
78        x86_panic((char *)__func__);
79        return 0;
80}
81
82struct thread_s * hal_get_current_thread()
83{
84        x86_panic((char *)__func__);
85        return curcpu()->ci_thr;
86}
87
88void hal_set_current_thread( struct thread_s * thread )
89{ 
90        x86_panic((char *)__func__);
91        curcpu()->ci_thr = thread;
92}
93
94/* -------------------------------------------------------------------------- */
95
96void hal_fpu_enable()
97{
98        x86_panic((char *)__func__);
99}
100
101void hal_fpu_disable()
102{
103        x86_panic((char *)__func__);
104}
105
106uint32_t hal_get_stack()
107{
108        x86_panic((char *)__func__);
109        return 0;
110}
111
112uint32_t hal_set_stack( void * new_val )
113{
114        x86_panic((char *)__func__);
115        return 0;
116}
117
118uint32_t hal_get_bad_vaddr()
119{
120        x86_panic((char *)__func__);
121        return 0;
122}
123
124uint32_t hal_uncached_read( uint32_t * ptr )
125{
126        x86_panic((char *)__func__);
127        return 0;
128}
129
130void hal_invalid_dcache_line( void * ptr )
131{
132        x86_panic((char *)__func__);
133}
134
135void hal_wbflush()
136{
137        x86_panic((char *)__func__);
138}
139
140void hal_rdbar()
141{
142        x86_panic((char *)__func__);
143}
144
145void hal_core_sleep()
146{
147        x86_panic((char *)__func__);
148}
149
150void hal_fixed_delay( uint32_t delay )
151{ 
152        x86_panic((char *)__func__);
153}
154
155void hal_get_mmu_excp( intptr_t * mmu_ins_excp_code,
156                       intptr_t * mmu_ins_bad_vaddr,
157                       intptr_t * mmu_dat_excp_code,
158                       intptr_t * mmu_dat_bad_vaddr )
159{
160        x86_panic((char *)__func__);
161}
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