source: trunk/kernel/devices/dev_pic.h @ 569

Last change on this file since 569 was 550, checked in by nicolas.van.phan@…, 6 years ago

Add SD card driver in kernel

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[1]1/*
[188]2 * dev_pic.h - PIC (Programmable Interrupt Controler) generic device API definition.
[1]3 *
[437]4 * Authors   Alain Greiner  (2016,2017,2018)
[1]5 *
6 * Copyright (c) UPMC Sorbonne Universites
7 *
8 * This file is part of ALMOS-MKH.
9 *
10 * ALMOS-MKH is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2.0 of the License.
13 *
14 * ALMOS-MKH is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with ALMOS-MKH; if not, write to the Free Software Foundation,
21 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#ifndef _DEV_PIC_H_
25#define _DEV_PIC_H_
26
[14]27#include <kernel_config.h>
[457]28#include <hal_kernel_types.h>
[1]29
30/*****************************************************************************************
[188]31 *     Generic Programmable Interrupt Controler definition
[1]32 *
[188]33 * The PIC generic device describes the the programmable hardware infrastructure used
34 * to route a given IRQ to a given core, in a given cluster, and to help the interrupt
35 * handler to select  and execute the relevant ISR (Interrupt Service Routine).
[279]36 * It handles the four following types of interrupts:
[1]37 *
[279]38 * 1) EXT_IRQ (External IRQ) generated by the external (shared) peripherals.
39 * 2) INT_IRQ (Internal IRQ) generated by the internal (replicated) peripherals.
40 * 3) TIM_IRQ (Timer IRQ) generated by the timers (one timer per core).
41 * 4) IPI_IRQ (Inter Processor IRQ) generated by software (one IPI per core).
42 *
43 * In supported manycores architectures, the PIC device contains two types
[188]44 * of hardware components:
45 * - the IOPIC is an external component, handling all external peripherals IRQs.
46 * - The LAPIC is an internal component, replicated in each cluster, handling local
47 *   peripherals IRQS, Timer IRQs and IPIs (inter-processor-interupts).
[1]48 *
[188]49 * The "source" device for each input IRQ to the external IOPIC component, is defined
50 * in the "arch_info" file, and registered in the "iopic_input" global variable
51 * at kernel initialization.
52 *
53 * The "source" device for each input IRQ to the replicated LAPIC components, is defined
54 * in the "arch_info" file, and stored in the "lapic_input" global variable
55 * at kernel initialization.
56 *
[279]57 * The PIC device defines generic commands that can be used by each kernel instance,
[188]58 * - to create in local cluster the PIC implementation specific interupt vector(s),
59 * - to bind a given IRQ (internal or external IRQ to a given core in the local cluster,
60 * - to configure and activate the TICK timer for a given core in the local cluster,
61 * - to allows the software to send an IPI to any core in any cluster.
62 * This API is detailed below, and must be implemented by all PIC implementations.
63 *
64 * In each cluster, a PIC implementation specific structure can be linked to the
65 * cluster manager or to the core descriptors to register the interrupt vectors
66 * used by the kernel to select the relevant ISR when an interrupt is received
[279]67 * by a given core in a given cluster.
[188]68 
69 * This PIC device does not execute itself I/O operations. It is just acting as a
70 * configurable interrupt router for I/O operation executed by other peripherals.
71 * Therefore, ALMOS-MKH does not use the PIC device waiting queue, does not creates
72 * a server thread for the PIC device, and does not register the command in the calling
73 * thread descriptor, but call directly the relevant driver function.
[1]74 ****************************************************************************************/
75 
[3]76/****  Forward declarations  ****/
77
78struct chdev_s;
79
[1]80/*****************************************************************************************
[188]81 * This defines the specific extension for the PIC chdev descriptor.
[407]82 * It contains the function pointers for all functions that mus be implemented
83 * by all implementation specific drivers.
[1]84 ****************************************************************************************/
85
[503]86typedef void   (bind_irq_t)     ( lid_t lid , struct chdev_s * src_chdev );
87typedef void   (enable_irq_t)   ( lid_t lid , xptr_t src_chdev_xp );
88typedef void   (disable_irq_t)  ( lid_t lid , xptr_t src_chdev_xp );
89typedef void   (enable_timer_t) ( uint32_t period );
90typedef void   (enable_ipi_t)   ( void );
91typedef void   (send_ipi_t)     ( cxy_t cxy , lid_t lid );
92typedef void   (ack_ipi_t)      ( void );
93typedef void   (extend_init_t)  ( uint32_t * lapic_base );
[188]94 
[1]95typedef struct pic_extend_s
96{
[205]97    bind_irq_t      * bind_irq;      /*! pointer on the driver "bind_irq" function      */ 
98    enable_irq_t    * enable_irq;    /*! pointer on the driver "enable_irq" function    */ 
99    disable_irq_t   * disable_irq;   /*! pointer on the driver "disable_irq" function   */ 
100    enable_timer_t  * enable_timer;  /*! pointer on the driver "enable_timer" function  */
[407]101    enable_ipi_t    * enable_ipi;    /*! pointer on the driver "enable_ipi" function    */
[205]102    send_ipi_t      * send_ipi;      /*! pointer on the driver "send_ipi" function      */
[407]103    ack_ipi_t       * ack_ipi;       /*! pointer on the driver "ack_ipi" function       */
[205]104    extend_init_t   * extend_init;   /*! pointer on the driver "init_extend" function   */
[1]105}
106pic_extend_t;
107
[205]108/*****************************************************************************************
[188]109 * This structure defines the input IRQS for the external IOPIC controller, that is used
110 * by external peripherals (IOC, NIC, TXT, etc.) to signal completion of an I/O operation.
111 * It describes the hardware wiring of IRQs between external peripherals and the IOPIC,
112 * as each entry contains the input IRQ index in IOPIC.
[407]113 * For a multi-channels/multi_IRQ peripheral, there is one chdev per IRQ.
[188]114 * This structure is replicated in each cluster. It is allocated as a global variable
115 * in the kernel_init.c file.
116 *****************************************************************************************/
117
118typedef struct iopic_input_s
119{
120    uint32_t   ioc[CONFIG_MAX_IOC_CHANNELS];
[407]121    uint32_t   txt_rx[CONFIG_MAX_TXT_CHANNELS];
122    uint32_t   txt_tx[CONFIG_MAX_TXT_CHANNELS];
[188]123    uint32_t   nic_rx[CONFIG_MAX_NIC_CHANNELS];
124    uint32_t   nic_tx[CONFIG_MAX_NIC_CHANNELS];
125    uint32_t   iob;
126}
127iopic_input_t;
128
129/******************************************************************************************
130 * This structure defines the input IRQS for the internal LAPIC controllers, that are used
131 * by internal peripherals IRQS (DMA, MMC) to signal completion of an I/O operation.
132 * It describes the hardware wiring of IRQs between internal peripherals and ICU,
133 * as each entry contains the input IRQ index in the LAPIC component.
134 * For a multi-channels peripheral, there is one chdev and one IRQ per channel.
135 * This structure is replicated in each cluster. It is allocated as a global variable
136 * in the kernel_init.c file.
137 *****************************************************************************************/
138
139typedef struct lapic_input_s
140{
141    uint32_t   dma[CONFIG_MAX_DMA_CHANNELS];
142    uint32_t   mmc;                             // MMC is single channel
[534]143    uint32_t   mtty;                            // Multi Tty (backup tty in cluster 0)
[550]144    uint32_t   sdcard;                          // SD card on cluster 00
[188]145}
146lapic_input_t;
147
[1]148/*****************************************************************************************
[188]149 * This enum defines the various implementations of the PIC device.
[1]150 * This array must be kept consistent with the define in arch_info.h file
151 ****************************************************************************************/
152
153enum pic_impl_e
154{
[188]155    IMPL_PIC_SCL =   0,     
[1]156    IMPL_PIC_I86 =   1,
157}
158pic_impl_t;
159
160/*****************************************************************************************
[188]161 * This function makes two initialisations :
[3]162 * - It initializes the PIC specific fields of the chdev descriptor.
[188]163 * - it initializes the implementation specific PIC hardware registers.
164 * It is executed once in cluster containing the PIC chdev, during kernel initialisation.
165 * The calling core goes to sleep in case of failure.
[1]166 *****************************************************************************************
[188]167 * @ pic        : local pointer on PIC device descriptor.
[1]168 ****************************************************************************************/
[188]169void dev_pic_init( struct chdev_s * pic );
[1]170
171/*****************************************************************************************
[188]172 * This function completes the PIC infrastructure initialisation in each cluster.
173 * It allocates memory for the local PIC extensions in the core descriptors and/or
174 * in the cluster manager, as required by the specific PIC implementation.
175 * This function is called by CPO in all clusters, during kernel initialisation phase.
176 * The calling core goes to sleep in case of failure.
[1]177 *****************************************************************************************
[188]178 * @ lapic_base  : local pointer on LAPIC component segment base.
[1]179 ****************************************************************************************/
[188]180void dev_pic_extend_init( uint32_t * lapic_base );
[1]181
182/*****************************************************************************************
[188]183 * This function configure the PIC device to route the IRQ generated by a local chdev,
184 * defined by the <src_chdev> argument, to a local core identified by the <lid> argument.
185 * This is a static binding, defined during kernel init: IRQ can be enabled/disabled,
186 * but the binding cannot be released. It can be used for both internal & external IRQs.
[407]187 * The configuration is actually done by the - implementation specific - driver,
188 * and this function just call the relevant driver.
[188]189 * WARNING : the IRQ must be explicitely enabled by the dev_pic_enable_irq() function.
[1]190 *****************************************************************************************
[188]191 * @ lid        : target core local index.
192 * @ src_chdev  : local pointer on source chdev descriptor.
[1]193 ****************************************************************************************/
[188]194void dev_pic_bind_irq( lid_t            lid,
195                       struct chdev_s * src_chdev );
[1]196
[188]197/*****************************************************************************************
[279]198 * This function enables the IRQ generated by a remote chdev, defined by the
[205]199 * <src_chdev_xp> argument. It can be called by any thread running in any cluster,
200 * and can be used for both internal & external IRQs.
[188]201 *****************************************************************************************
[205]202 * @ lid           : target core local index (in cluster containing the source chdev).
203 * @ src_chdev_xp  : extended  pointer on source chdev descriptor.
[188]204 ****************************************************************************************/
[205]205void dev_pic_enable_irq( lid_t   lid,
206                         xptr_t  src_chdev_xp );
[188]207
208/*****************************************************************************************
[205]209 * This function disables remote IRQ generated by a remote chdev, defined by the
210 * <src_chdev_xp> argument. It can be called by any thread running in any cluster,
[279]211 * and can be used for both INT_IRq & EXT_IRQ.
[188]212 *****************************************************************************************
[205]213 * @ lid           : target core local index (in cluster containing the source chdev).
214 * @ src_chdev_xp  : extended pointer on sour chdev descriptor.
[188]215 ****************************************************************************************/
[205]216void dev_pic_disable_irq( lid_t   lid,
217                          xptr_t  src_chdev_xp );
[188]218
219/*****************************************************************************************
[279]220 * This function activates the TIM_IRQ for the calling core.
[406]221 * The <period> argument is a number of milli-seconds between two successive IRQs.
222 * It is converted to a number of cycles by the PIC driver implementation.
[188]223 *****************************************************************************************
[406]224 * @ period      : number of milliseconds.
[188]225 ****************************************************************************************/
226void dev_pic_enable_timer( uint32_t period );
227
228/*****************************************************************************************
[279]229 * This function activates the IPI_IRQ for the calling core.
230 ****************************************************************************************/
[483]231void dev_pic_enable_ipi( void );
[279]232
233/*****************************************************************************************
[188]234 * This function allows the calling thread to send an IPI to any core in any cluster.
235 * The target core is identified by the <cxy> & <lid> arguments.
236 *****************************************************************************************
237 * @ cxy        : target core cluster.
238 * @ lid        : target core local index.
239 ****************************************************************************************/
240void dev_pic_send_ipi( cxy_t  cxy,
241                       lid_t  lid );
242
[407]243/*****************************************************************************************
244 * This function acknowledges the IPI identified by the calling core local index,
245 * in the local LAPIC component.
246 ****************************************************************************************/
[483]247void dev_pic_ack_ipi( void );
[188]248
[407]249/*****************************************************************************************
250 * This debug function displays the content of the iopic_input structure,
251 * that register the input IRQS for the external IOPIC controller.
252 ****************************************************************************************/
[483]253void dev_pic_inputs_display( void );
[407]254
[1]255#endif  /* _DEV_PIC_H_ */
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