source: trunk/libs/newlib/src/include/opcode/avr.h @ 444

Last change on this file since 444 was 444, checked in by satin@…, 6 years ago

add newlib,libalmos-mkh, restructure shared_syscalls.h and mini-libc
File size: 15.1 KB
Line 
1/* Opcode table for the Atmel AVR micro controllers.
2
3   Copyright 2000, 2001, 2004, 2006, 2008, 2010, 2012 Free Software Foundation, Inc.
4   Contributed by Denis Chertykov <denisc@overta.ru>
5   
6   This program is free software; you can redistribute it and/or modify
7   it under the terms of the GNU General Public License as published by
8   the Free Software Foundation; either version 3, or (at your option)
9   any later version.
10
11   This program is distributed in the hope that it will be useful,
12   but WITHOUT ANY WARRANTY; without even the implied warranty of
13   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14   GNU General Public License for more details.
15
16   You should have received a copy of the GNU General Public License
17   along with this program; if not, write to the Free Software
18   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19   MA 02110-1301, USA.  */
20
21#define AVR_ISA_1200  0x0001 /* In the beginning there was ...  */
22#define AVR_ISA_LPM   0x0002 /* device has LPM */
23#define AVR_ISA_LPMX  0x0004 /* device has LPM Rd,Z[+] */
24#define AVR_ISA_SRAM  0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */
25#define AVR_ISA_MEGA  0x0020 /* device has >8K program memory (JMP and CALL
26                                supported, no 8K wrap on RJMP and RCALL) */
27#define AVR_ISA_MUL   0x0040 /* device has new core (MUL, FMUL, ...) */
28#define AVR_ISA_ELPM  0x0080 /* device has >64K program memory (ELPM) */
29#define AVR_ISA_ELPMX 0x0100 /* device has ELPM Rd,Z[+] */
30#define AVR_ISA_SPM   0x0200 /* device can program itself */
31#define AVR_ISA_BRK   0x0400 /* device has BREAK (on-chip debug) */
32#define AVR_ISA_EIND  0x0800 /* device has >128K program memory (none yet) */
33#define AVR_ISA_MOVW  0x1000 /* device has MOVW */
34#define AVR_ISA_SPMX  0x2000 /* device has SPM Z[+] */
35#define AVR_ISA_DES   0x4000 /* device has DES */
36#define AVR_ISA_RMW   0x8000 /* device has RMW instructions XCH,LAC,LAS,LAT */
37
38#define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
39#define AVR_ISA_2xxx  (AVR_ISA_TINY1 | AVR_ISA_SRAM)
40/* For the attiny26 which is missing LPM Rd,Z+.  */
41#define AVR_ISA_2xxe  (AVR_ISA_2xxx | AVR_ISA_LPMX)
42#define AVR_ISA_RF401 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX)
43#define AVR_ISA_TINY2 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX | \
44                       AVR_ISA_SPM  | AVR_ISA_BRK)
45#define AVR_ISA_M603  (AVR_ISA_2xxx | AVR_ISA_MEGA)
46#define AVR_ISA_M103  (AVR_ISA_M603 | AVR_ISA_ELPM)
47#define AVR_ISA_M8    (AVR_ISA_2xxx | AVR_ISA_MUL | AVR_ISA_MOVW | \
48                       AVR_ISA_LPMX | AVR_ISA_SPM)
49#define AVR_ISA_PWMx  (AVR_ISA_M8   | AVR_ISA_BRK)
50#define AVR_ISA_M161  (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | \
51                       AVR_ISA_LPMX | AVR_ISA_SPM)
52#define AVR_ISA_94K   (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | AVR_ISA_LPMX)
53#define AVR_ISA_M323  (AVR_ISA_M161 | AVR_ISA_BRK)
54#define AVR_ISA_M128  (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX)
55#define AVR_ISA_M256  (AVR_ISA_M128 | AVR_ISA_EIND)
56#define AVR_ISA_XMEGA (AVR_ISA_M256 | AVR_ISA_SPMX | AVR_ISA_DES)
57#define AVR_ISA_XMEGAU (AVR_ISA_XMEGA | AVR_ISA_RMW)
58
59#define AVR_ISA_AVR1   AVR_ISA_TINY1
60#define AVR_ISA_AVR2   AVR_ISA_2xxx
61#define AVR_ISA_AVR25  AVR_ISA_TINY2
62#define AVR_ISA_AVR3   AVR_ISA_M603
63#define AVR_ISA_AVR31   AVR_ISA_M103
64#define AVR_ISA_AVR35   (AVR_ISA_AVR3 | AVR_ISA_MOVW | \
65                        AVR_ISA_LPMX | AVR_ISA_SPM | AVR_ISA_BRK)
66#define AVR_ISA_AVR3_ALL (AVR_ISA_AVR3 | AVR_ISA_AVR31 | AVR_ISA_AVR35)
67#define AVR_ISA_AVR4   AVR_ISA_PWMx
68#define AVR_ISA_AVR5   AVR_ISA_M323
69#define AVR_ISA_AVR51  AVR_ISA_M128
70#define AVR_ISA_AVR6   (AVR_ISA_1200 | AVR_ISA_LPM | AVR_ISA_LPMX | \
71                        AVR_ISA_SRAM | AVR_ISA_MEGA | AVR_ISA_MUL | \
72                        AVR_ISA_ELPM | AVR_ISA_ELPMX | AVR_ISA_SPM | \
73                        AVR_ISA_BRK | AVR_ISA_EIND | AVR_ISA_MOVW)
74
75#define REGISTER_P(x) ((x) == 'r'               \
76                       || (x) == 'd'            \
77                       || (x) == 'w'            \
78                       || (x) == 'a'            \
79                       || (x) == 'v')
80
81/* Undefined combination of operands - does the register
82   operand overlap with pre-decremented or post-incremented
83   pointer register (like ld r31,Z+)?  */
84#define AVR_UNDEF_P(x) (((x) & 0xFFED) == 0x91E5 ||             \
85  ((x) & 0xFDEF) == 0x91AD || ((x) & 0xFDEF) == 0x91AE ||       \
86  ((x) & 0xFDEF) == 0x91C9 || ((x) & 0xFDEF) == 0x91CA ||       \
87  ((x) & 0xFDEF) == 0x91E1 || ((x) & 0xFDEF) == 0x91E2)
88
89/* Is this a skip instruction {cpse,sbic,sbis,sbrc,sbrs}?  */
90#define AVR_SKIP_P(x) (((x) & 0xFC00) == 0x1000 ||              \
91  ((x) & 0xFD00) == 0x9900 || ((x) & 0xFC08) == 0xFC00)
92
93/* Is this `ldd r,b+0' or `std b+0,r' (b={Y,Z}, disassembled as
94   `ld r,b' or `st b,r' respectively - next opcode entry)?  */
95#define AVR_DISP0_P(x) (((x) & 0xFC07) == 0x8000)
96
97/* constraint letters
98   r - any register
99   d - `ldi' register (r16-r31)
100   v - `movw' even register (r0, r2, ..., r28, r30)
101   a - `fmul' register (r16-r23)
102   w - `adiw' register (r24,r26,r28,r30)
103   e - pointer registers (X,Y,Z)
104   b - base pointer register and displacement ([YZ]+disp)
105   z - Z pointer register (for [e]lpm Rd,Z[+])
106   M - immediate value from 0 to 255
107   n - immediate value from 0 to 255 ( n = ~M ). Relocation impossible
108   s - immediate value from 0 to 7
109   P - Port address value from 0 to 63. (in, out)
110   p - Port address value from 0 to 31. (cbi, sbi, sbic, sbis)
111   K - immediate value from 0 to 63 (used in `adiw', `sbiw')
112   i - immediate value
113   l - signed pc relative offset from -64 to 63
114   L - signed pc relative offset from -2048 to 2047
115   h - absolute code address (call, jmp)
116   S - immediate value from 0 to 7 (S = s << 4)
117   E - immediate value from 0 to 15, shifted left by 4 (des)
118   ? - use this opcode entry if no parameters, else use next opcode entry
119
120   Order is important - some binary opcodes have more than one name,
121   the disassembler will only see the first match.
122
123   Remaining undefined opcodes (1699 total - some of them might work
124   as normal instructions if not all of the bits are decoded):
125
126    0x0001...0x00ff    (255) (known to be decoded as `nop' by the old core)
127   "100100xxxxxxx011"  (128) 0x9[0-3][0-9a-f][3b]
128   "100100xxxxxx1000"   (64) 0x9[0-3][0-9a-f]8
129   "1001010xxxxx0100"   (32) 0x9[45][0-9a-f]4
130   "1001010x001x1001"    (4) 0x9[45][23]9
131   "1001010x01xx1001"    (8) 0x9[45][4-7]9
132   "1001010x1xxx1001"   (16) 0x9[45][8-9a-f]9
133   "1001010xxxxx1011"   (32) 0x9[45][0-9a-f]b
134   "10010101001x1000"    (2) 0x95[23]8
135   "1001010101xx1000"    (4) 0x95[4-7]8
136   "1001010110111000"    (1) 0x95b8
137   "1001010111111000"    (1) 0x95f8 (`espm' removed in databook update)
138   "11111xxxxxxx1xxx" (1024) 0xf[8-9a-f][0-9a-f][8-9a-f]
139 */
140
141AVR_INSN (clc,  "",    "1001010010001000", 1, AVR_ISA_1200, 0x9488)
142AVR_INSN (clh,  "",    "1001010011011000", 1, AVR_ISA_1200, 0x94d8)
143AVR_INSN (cli,  "",    "1001010011111000", 1, AVR_ISA_1200, 0x94f8)
144AVR_INSN (cln,  "",    "1001010010101000", 1, AVR_ISA_1200, 0x94a8)
145AVR_INSN (cls,  "",    "1001010011001000", 1, AVR_ISA_1200, 0x94c8)
146AVR_INSN (clt,  "",    "1001010011101000", 1, AVR_ISA_1200, 0x94e8)
147AVR_INSN (clv,  "",    "1001010010111000", 1, AVR_ISA_1200, 0x94b8)
148AVR_INSN (clz,  "",    "1001010010011000", 1, AVR_ISA_1200, 0x9498)
149
150AVR_INSN (sec,  "",    "1001010000001000", 1, AVR_ISA_1200, 0x9408)
151AVR_INSN (seh,  "",    "1001010001011000", 1, AVR_ISA_1200, 0x9458)
152AVR_INSN (sei,  "",    "1001010001111000", 1, AVR_ISA_1200, 0x9478)
153AVR_INSN (sen,  "",    "1001010000101000", 1, AVR_ISA_1200, 0x9428)
154AVR_INSN (ses,  "",    "1001010001001000", 1, AVR_ISA_1200, 0x9448)
155AVR_INSN (set,  "",    "1001010001101000", 1, AVR_ISA_1200, 0x9468)
156AVR_INSN (sev,  "",    "1001010000111000", 1, AVR_ISA_1200, 0x9438)
157AVR_INSN (sez,  "",    "1001010000011000", 1, AVR_ISA_1200, 0x9418)
158
159   /* Same as {cl,se}[chinstvz] above.  */
160AVR_INSN (bclr, "S",   "100101001SSS1000", 1, AVR_ISA_1200, 0x9488)
161AVR_INSN (bset, "S",   "100101000SSS1000", 1, AVR_ISA_1200, 0x9408)
162
163AVR_INSN (icall,"",    "1001010100001001", 1, AVR_ISA_2xxx, 0x9509)
164AVR_INSN (ijmp, "",    "1001010000001001", 1, AVR_ISA_2xxx, 0x9409)
165
166AVR_INSN (lpm,  "?",   "1001010111001000", 1, AVR_ISA_TINY1,0x95c8)
167AVR_INSN (lpm,  "r,z", "1001000ddddd010+", 1, AVR_ISA_LPMX, 0x9004)
168AVR_INSN (elpm, "?",   "1001010111011000", 1, AVR_ISA_ELPM, 0x95d8)
169AVR_INSN (elpm, "r,z", "1001000ddddd011+", 1, AVR_ISA_ELPMX,0x9006)
170
171AVR_INSN (nop,  "",    "0000000000000000", 1, AVR_ISA_1200, 0x0000)
172AVR_INSN (ret,  "",    "1001010100001000", 1, AVR_ISA_1200, 0x9508)
173AVR_INSN (reti, "",    "1001010100011000", 1, AVR_ISA_1200, 0x9518)
174AVR_INSN (sleep,"",    "1001010110001000", 1, AVR_ISA_1200, 0x9588)
175AVR_INSN (break,"",    "1001010110011000", 1, AVR_ISA_BRK,  0x9598)
176AVR_INSN (wdr,  "",    "1001010110101000", 1, AVR_ISA_1200, 0x95a8)
177AVR_INSN (spm,  "?",   "1001010111101000", 1, AVR_ISA_SPM,  0x95e8)
178AVR_INSN (spm,  "z",   "10010101111+1000", 1, AVR_ISA_SPMX, 0x95e8)
179
180AVR_INSN (adc,  "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
181AVR_INSN (add,  "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
182AVR_INSN (and,  "r,r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000)
183AVR_INSN (cp,   "r,r", "000101rdddddrrrr", 1, AVR_ISA_1200, 0x1400)
184AVR_INSN (cpc,  "r,r", "000001rdddddrrrr", 1, AVR_ISA_1200, 0x0400)
185AVR_INSN (cpse, "r,r", "000100rdddddrrrr", 1, AVR_ISA_1200, 0x1000)
186AVR_INSN (eor,  "r,r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
187AVR_INSN (mov,  "r,r", "001011rdddddrrrr", 1, AVR_ISA_1200, 0x2c00)
188AVR_INSN (mul,  "r,r", "100111rdddddrrrr", 1, AVR_ISA_MUL,  0x9c00)
189AVR_INSN (or,   "r,r", "001010rdddddrrrr", 1, AVR_ISA_1200, 0x2800)
190AVR_INSN (sbc,  "r,r", "000010rdddddrrrr", 1, AVR_ISA_1200, 0x0800)
191AVR_INSN (sub,  "r,r", "000110rdddddrrrr", 1, AVR_ISA_1200, 0x1800)
192
193   /* Shorthand for {eor,add,adc,and} r,r above.  */
194AVR_INSN (clr,  "r=r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
195AVR_INSN (lsl,  "r=r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
196AVR_INSN (rol,  "r=r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
197AVR_INSN (tst,  "r=r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000)
198
199AVR_INSN (andi, "d,M", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000)
200  /*XXX special case*/
201AVR_INSN (cbr,  "d,n", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000)
202
203AVR_INSN (ldi,  "d,M", "1110KKKKddddKKKK", 1, AVR_ISA_1200, 0xe000)
204AVR_INSN (ser,  "d",   "11101111dddd1111", 1, AVR_ISA_1200, 0xef0f)
205
206AVR_INSN (ori,  "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000)
207AVR_INSN (sbr,  "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000)
208
209AVR_INSN (cpi,  "d,M", "0011KKKKddddKKKK", 1, AVR_ISA_1200, 0x3000)
210AVR_INSN (sbci, "d,M", "0100KKKKddddKKKK", 1, AVR_ISA_1200, 0x4000)
211AVR_INSN (subi, "d,M", "0101KKKKddddKKKK", 1, AVR_ISA_1200, 0x5000)
212
213AVR_INSN (sbrc, "r,s", "1111110rrrrr0sss", 1, AVR_ISA_1200, 0xfc00)
214AVR_INSN (sbrs, "r,s", "1111111rrrrr0sss", 1, AVR_ISA_1200, 0xfe00)
215AVR_INSN (bld,  "r,s", "1111100ddddd0sss", 1, AVR_ISA_1200, 0xf800)
216AVR_INSN (bst,  "r,s", "1111101ddddd0sss", 1, AVR_ISA_1200, 0xfa00)
217
218AVR_INSN (in,   "r,P", "10110PPdddddPPPP", 1, AVR_ISA_1200, 0xb000)
219AVR_INSN (out,  "P,r", "10111PPrrrrrPPPP", 1, AVR_ISA_1200, 0xb800)
220
221AVR_INSN (adiw, "w,K", "10010110KKddKKKK", 1, AVR_ISA_2xxx, 0x9600)
222AVR_INSN (sbiw, "w,K", "10010111KKddKKKK", 1, AVR_ISA_2xxx, 0x9700)
223
224AVR_INSN (cbi,  "p,s", "10011000pppppsss", 1, AVR_ISA_1200, 0x9800)
225AVR_INSN (sbi,  "p,s", "10011010pppppsss", 1, AVR_ISA_1200, 0x9a00)
226AVR_INSN (sbic, "p,s", "10011001pppppsss", 1, AVR_ISA_1200, 0x9900)
227AVR_INSN (sbis, "p,s", "10011011pppppsss", 1, AVR_ISA_1200, 0x9b00)
228
229AVR_INSN (brcc, "l",   "111101lllllll000", 1, AVR_ISA_1200, 0xf400)
230AVR_INSN (brcs, "l",   "111100lllllll000", 1, AVR_ISA_1200, 0xf000)
231AVR_INSN (breq, "l",   "111100lllllll001", 1, AVR_ISA_1200, 0xf001)
232AVR_INSN (brge, "l",   "111101lllllll100", 1, AVR_ISA_1200, 0xf404)
233AVR_INSN (brhc, "l",   "111101lllllll101", 1, AVR_ISA_1200, 0xf405)
234AVR_INSN (brhs, "l",   "111100lllllll101", 1, AVR_ISA_1200, 0xf005)
235AVR_INSN (brid, "l",   "111101lllllll111", 1, AVR_ISA_1200, 0xf407)
236AVR_INSN (brie, "l",   "111100lllllll111", 1, AVR_ISA_1200, 0xf007)
237AVR_INSN (brlo, "l",   "111100lllllll000", 1, AVR_ISA_1200, 0xf000)
238AVR_INSN (brlt, "l",   "111100lllllll100", 1, AVR_ISA_1200, 0xf004)
239AVR_INSN (brmi, "l",   "111100lllllll010", 1, AVR_ISA_1200, 0xf002)
240AVR_INSN (brne, "l",   "111101lllllll001", 1, AVR_ISA_1200, 0xf401)
241AVR_INSN (brpl, "l",   "111101lllllll010", 1, AVR_ISA_1200, 0xf402)
242AVR_INSN (brsh, "l",   "111101lllllll000", 1, AVR_ISA_1200, 0xf400)
243AVR_INSN (brtc, "l",   "111101lllllll110", 1, AVR_ISA_1200, 0xf406)
244AVR_INSN (brts, "l",   "111100lllllll110", 1, AVR_ISA_1200, 0xf006)
245AVR_INSN (brvc, "l",   "111101lllllll011", 1, AVR_ISA_1200, 0xf403)
246AVR_INSN (brvs, "l",   "111100lllllll011", 1, AVR_ISA_1200, 0xf003)
247
248   /* Same as br?? above.  */
249AVR_INSN (brbc, "s,l", "111101lllllllsss", 1, AVR_ISA_1200, 0xf400)
250AVR_INSN (brbs, "s,l", "111100lllllllsss", 1, AVR_ISA_1200, 0xf000)
251
252AVR_INSN (rcall, "L",  "1101LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xd000)
253AVR_INSN (rjmp,  "L",  "1100LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xc000)
254
255AVR_INSN (call, "h",   "1001010hhhhh111h", 2, AVR_ISA_MEGA, 0x940e)
256AVR_INSN (jmp,  "h",   "1001010hhhhh110h", 2, AVR_ISA_MEGA, 0x940c)
257
258AVR_INSN (asr,  "r",   "1001010rrrrr0101", 1, AVR_ISA_1200, 0x9405)
259AVR_INSN (com,  "r",   "1001010rrrrr0000", 1, AVR_ISA_1200, 0x9400)
260AVR_INSN (dec,  "r",   "1001010rrrrr1010", 1, AVR_ISA_1200, 0x940a)
261AVR_INSN (inc,  "r",   "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403)
262AVR_INSN (lsr,  "r",   "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406)
263AVR_INSN (neg,  "r",   "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401)
264AVR_INSN (pop,  "r",   "1001000rrrrr1111", 1, AVR_ISA_2xxx, 0x900f)
265AVR_INSN (push, "r",   "1001001rrrrr1111", 1, AVR_ISA_2xxx, 0x920f)
266AVR_INSN (ror,  "r",   "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407)
267AVR_INSN (swap, "r",   "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402)
268
269   /* Atomic memory operations for XMEGA.  List before `sts'.  */
270AVR_INSN (xch,  "z,r",   "1001001rrrrr0100", 1, AVR_ISA_RMW, 0x9204)
271AVR_INSN (las,  "z,r",   "1001001rrrrr0101", 1, AVR_ISA_RMW, 0x9205)
272AVR_INSN (lac,  "z,r",   "1001001rrrrr0110", 1, AVR_ISA_RMW, 0x9206)
273AVR_INSN (lat,  "z,r",   "1001001rrrrr0111", 1, AVR_ISA_RMW, 0x9207)
274
275   /* Known to be decoded as `nop' by the old core.  */
276AVR_INSN (movw, "v,v", "00000001ddddrrrr", 1, AVR_ISA_MOVW, 0x0100)
277AVR_INSN (muls, "d,d", "00000010ddddrrrr", 1, AVR_ISA_MUL,  0x0200)
278AVR_INSN (mulsu,"a,a", "000000110ddd0rrr", 1, AVR_ISA_MUL,  0x0300)
279AVR_INSN (fmul, "a,a", "000000110ddd1rrr", 1, AVR_ISA_MUL,  0x0308)
280AVR_INSN (fmuls,"a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL,  0x0380)
281AVR_INSN (fmulsu,"a,a","000000111ddd1rrr", 1, AVR_ISA_MUL,  0x0388)
282
283AVR_INSN (sts,  "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200)
284AVR_INSN (lds,  "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000)
285
286   /* Special case for b+0, `e' must be next entry after `b',
287      b={Y=1,Z=0}, ee={X=11,Y=10,Z=00}, !=1 if -e or e+ or X.  */
288AVR_INSN (ldd,  "r,b", "10o0oo0dddddbooo", 1, AVR_ISA_2xxx, 0x8000)
289AVR_INSN (ld,   "r,e", "100!000dddddee-+", 1, AVR_ISA_1200, 0x8000)
290AVR_INSN (std,  "b,r", "10o0oo1rrrrrbooo", 1, AVR_ISA_2xxx, 0x8200)
291AVR_INSN (st,   "e,r", "100!001rrrrree-+", 1, AVR_ISA_1200, 0x8200)
292
293   /* These are for devices that don't exist yet
294      (>128K program memory, PC = EIND:Z).  */
295AVR_INSN (eicall, "",  "1001010100011001", 1, AVR_ISA_EIND, 0x9519)
296AVR_INSN (eijmp, "",   "1001010000011001", 1, AVR_ISA_EIND, 0x9419)
297
298/* DES instruction for encryption and decryption */
299AVR_INSN (des,  "E",   "10010100EEEE1011", 1, AVR_ISA_DES,  0x940B)
300
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