| 1 | /* |
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| 2 | |
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| 3 | Copyright (c) 2008 Red Hat Incorporated. |
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| 4 | All rights reserved. |
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| 5 | |
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| 6 | Redistribution and use in source and binary forms, with or without |
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| 7 | modification, are permitted provided that the following conditions are met: |
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| 8 | |
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| 9 | Redistributions of source code must retain the above copyright |
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| 10 | notice, this list of conditions and the following disclaimer. |
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| 11 | |
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| 12 | Redistributions in binary form must reproduce the above copyright |
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| 13 | notice, this list of conditions and the following disclaimer in the |
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| 14 | documentation and/or other materials provided with the distribution. |
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| 15 | |
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| 16 | The name of Red Hat Incorporated may not be used to endorse |
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| 17 | or promote products derived from this software without specific |
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| 18 | prior written permission. |
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| 19 | |
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| 20 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 21 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 22 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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| 23 | DISCLAIMED. IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY |
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| 24 | DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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| 25 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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| 26 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
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| 27 | ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 28 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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| 29 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 30 | |
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| 31 | */ |
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| 32 | |
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| 33 | /* This is a sample program that shows how to use a few of the |
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| 34 | features of the M32C port of GCC, Binutils, and Newlib. */ |
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| 35 | |
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| 36 | #include <varvects.h> |
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| 37 | |
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| 38 | typedef unsigned char byte; |
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| 39 | typedef unsigned short word; |
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| 40 | |
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| 41 | #define prcr (*(volatile byte *)0x000a) |
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| 42 | #define cm0 (*(volatile byte *)0x0006) |
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| 43 | #define cm1 (*(volatile byte *)0x0007) |
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| 44 | #define ocd (*(volatile byte *)0x000c) |
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| 45 | |
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| 46 | #ifdef __r8c_cpu__ |
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| 47 | /* These are for the R8C/20 with LEDs on port P2 */ |
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| 48 | |
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| 49 | #define tracr (*(volatile byte *)0x0100) |
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| 50 | #define traioc (*(volatile byte *)0x0101) |
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| 51 | #define tramr (*(volatile byte *)0x0102) |
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| 52 | #define trapre (*(volatile byte *)0x0103) |
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| 53 | #define tra (*(volatile byte *)0x0104) |
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| 54 | #define traic (*(volatile byte *)0x0056) |
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| 55 | |
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| 56 | #define pd2 (*(volatile byte *)0x00e6) |
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| 57 | #define p2 (*(volatile byte *)0x00e4) |
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| 58 | |
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| 59 | #define ivec_timer_ra 22 |
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| 60 | #endif |
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| 61 | |
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| 62 | #ifdef __m32c_cpu__ |
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| 63 | /* These are for the M32C/83 with LEDs on port P0 and P1 */ |
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| 64 | |
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| 65 | #define ta0 (*(volatile word *)0x0346) |
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| 66 | #define ta0mr (*(volatile byte *)0x0356) |
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| 67 | #define tabsr (*(volatile byte *)0x0340) |
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| 68 | #define ta0ic (*(volatile byte *)0x006c) |
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| 69 | |
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| 70 | #define pd0 (*(volatile byte *)0x03e2) |
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| 71 | #define pd1 (*(volatile byte *)0x03e3) |
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| 72 | #define p0 (*(volatile byte *)0x03e0) |
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| 73 | #define p1 (*(volatile byte *)0x03e1) |
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| 74 | |
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| 75 | #define ivec_timer_a0 12 |
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| 76 | #endif |
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| 77 | |
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| 78 | /* Newlib's exit() pulls in lots of other things. Main() should never |
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| 79 | exit, but if it did, you could hard-reset the chip here. */ |
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| 80 | void |
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| 81 | exit(int rv) |
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| 82 | { |
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| 83 | while (1) |
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| 84 | asm volatile (""); |
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| 85 | } |
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| 86 | |
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| 87 | #ifdef __r8c_cpu__ |
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| 88 | /* The "constructor" attribute causes the startup code to call this |
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| 89 | sometime before main() is called. */ |
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| 90 | __attribute__((constructor)) |
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| 91 | void |
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| 92 | fast_clock(void) |
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| 93 | { |
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| 94 | asm("fclr I"); |
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| 95 | prcr = 1; |
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| 96 | cm0 = 0x08; |
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| 97 | cm1 = 0x38; |
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| 98 | asm("nop"); |
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| 99 | asm("nop"); |
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| 100 | asm("nop"); |
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| 101 | asm("nop"); |
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| 102 | ocd = 0; |
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| 103 | prcr = 0; |
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| 104 | asm("fset I"); |
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| 105 | } |
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| 106 | #endif |
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| 107 | |
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| 108 | /* We mark this volatile in case a non-interrupt function wants to |
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| 109 | read it, else gcc may optimize away extra reads. */ |
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| 110 | static volatile int tc = 1; |
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| 111 | |
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| 112 | /* The "interrupt" attribute changes the function entry/exit to |
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| 113 | properly preserve any changed registers. */ |
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| 114 | static void __attribute__((interrupt)) |
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| 115 | timer_ra_interrupt() |
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| 116 | { |
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| 117 | tc ++; |
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| 118 | #ifdef __r8c_cpu__ |
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| 119 | p2 = tc >> 4; |
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| 120 | #else |
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| 121 | p1 = tc; |
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| 122 | p0 = tc >> 8; |
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| 123 | #endif |
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| 124 | } |
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| 125 | |
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| 126 | main() |
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| 127 | { |
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| 128 | #ifdef __r8c_cpu__ |
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| 129 | pd2 = 0xff; |
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| 130 | |
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| 131 | /* TIMER RA */ |
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| 132 | tracr = 0x00; |
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| 133 | traioc = 0x00; |
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| 134 | tramr = 0x00; /* timer mode, f1 */ |
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| 135 | trapre = 255; /* prescaler */ |
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| 136 | tra = 255; /* cycle count */ |
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| 137 | |
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| 138 | _set_var_vect (timer_ra_interrupt, ivec_timer_ra); |
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| 139 | traic = 5; |
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| 140 | tracr = 1; |
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| 141 | #endif |
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| 142 | |
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| 143 | #ifdef __m32c_cpu__ |
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| 144 | pd0 = 0xff; |
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| 145 | pd1 = 0xff; |
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| 146 | |
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| 147 | /* TIMER A0 */ |
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| 148 | ta0mr = 0x00; /* Timer A0 mode register */ |
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| 149 | ta0 = 65535; /* Timer A0 register */ |
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| 150 | |
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| 151 | _set_var_vect (timer_ra_interrupt, ivec_timer_a0); |
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| 152 | ta0ic = 5; |
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| 153 | tabsr = 0xff; |
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| 154 | #endif |
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| 155 | |
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| 156 | /* main() must never return. */ |
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| 157 | while (1) |
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| 158 | ; |
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| 159 | } |
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