| 1 | /* |
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| 2 | Copyright (c) 2011, 2012 ARM Ltd |
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| 3 | All rights reserved. |
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| 4 | |
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| 5 | Redistribution and use in source and binary forms, with or without |
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| 6 | modification, are permitted provided that the following conditions |
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| 7 | are met: |
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| 8 | 1. Redistributions of source code must retain the above copyright |
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| 9 | notice, this list of conditions and the following disclaimer. |
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| 10 | 2. Redistributions in binary form must reproduce the above copyright |
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| 11 | notice, this list of conditions and the following disclaimer in the |
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| 12 | documentation and/or other materials provided with the distribution. |
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| 13 | 3. The name of the company may not be used to endorse or promote |
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| 14 | products derived from this software without specific prior written |
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| 15 | permission. |
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| 16 | |
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| 17 | THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED |
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| 18 | WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
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| 19 | MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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| 21 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED |
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| 22 | TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
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| 23 | PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
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| 24 | LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
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| 25 | NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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| 26 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |
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| 29 | #define GPR_LAYOUT \ |
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| 30 | REG_PAIR (x19, x20, 0); \ |
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| 31 | REG_PAIR (x21, x22, 16); \ |
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| 32 | REG_PAIR (x23, x24, 32); \ |
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| 33 | REG_PAIR (x25, x26, 48); \ |
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| 34 | REG_PAIR (x27, x28, 64); \ |
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| 35 | REG_PAIR (x29, x30, 80); \ |
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| 36 | REG_ONE (x16, 96) |
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| 37 | |
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| 38 | #define FPR_LAYOUT \ |
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| 39 | REG_PAIR ( d8, d9, 112); \ |
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| 40 | REG_PAIR (d10, d11, 128); \ |
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| 41 | REG_PAIR (d12, d13, 144); \ |
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| 42 | REG_PAIR (d14, d15, 160); |
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| 43 | |
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| 44 | // int setjmp (jmp_buf) |
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| 45 | .global setjmp |
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| 46 | .type setjmp, %function |
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| 47 | setjmp: |
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| 48 | mov x16, sp |
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| 49 | #define REG_PAIR(REG1, REG2, OFFS) stp REG1, REG2, [x0, OFFS] |
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| 50 | #define REG_ONE(REG1, OFFS) str REG1, [x0, OFFS] |
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| 51 | GPR_LAYOUT |
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| 52 | FPR_LAYOUT |
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| 53 | #undef REG_PAIR |
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| 54 | #undef REG_ONE |
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| 55 | mov w0, #0 |
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| 56 | ret |
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| 57 | .size setjmp, .-setjmp |
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| 58 | |
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| 59 | // void longjmp (jmp_buf, int) __attribute__ ((noreturn)) |
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| 60 | .global longjmp |
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| 61 | .type longjmp, %function |
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| 62 | longjmp: |
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| 63 | #define REG_PAIR(REG1, REG2, OFFS) ldp REG1, REG2, [x0, OFFS] |
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| 64 | #define REG_ONE(REG1, OFFS) ldr REG1, [x0, OFFS] |
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| 65 | GPR_LAYOUT |
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| 66 | FPR_LAYOUT |
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| 67 | #undef REG_PAIR |
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| 68 | #undef REG_ONE |
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| 69 | mov sp, x16 |
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| 70 | cmp w1, #0 |
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| 71 | cinc w0, w1, eq |
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| 72 | // use br not ret, as ret is guaranteed to mispredict |
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| 73 | br x30 |
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| 74 | .size longjmp, .-longjmp |
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