1 | /* |
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2 | Copyright (c) 2015, Synopsys, Inc. All rights reserved. |
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3 | |
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4 | Redistribution and use in source and binary forms, with or without |
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5 | modification, are permitted provided that the following conditions are met: |
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6 | |
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7 | 1) Redistributions of source code must retain the above copyright notice, |
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8 | this list of conditions and the following disclaimer. |
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9 | |
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10 | 2) Redistributions in binary form must reproduce the above copyright notice, |
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11 | this list of conditions and the following disclaimer in the documentation |
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12 | and/or other materials provided with the distribution. |
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13 | |
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14 | 3) Neither the name of the Synopsys, Inc., nor the names of its contributors |
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15 | may be used to endorse or promote products derived from this software |
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16 | without specific prior written permission. |
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17 | |
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18 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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19 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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20 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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21 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
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22 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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23 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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24 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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25 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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26 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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27 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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28 | POSSIBILITY OF SUCH DAMAGE. |
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29 | */ |
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30 | |
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31 | /* This implementation is optimized for performance. For code size a generic |
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32 | implementation of this function from newlib/libc/string/memcmp.c will be |
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33 | used. */ |
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34 | #if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED) |
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35 | |
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36 | #include "asm.h" |
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37 | |
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38 | #if defined (__ARC601__) || !defined (__ARC_NORM__) \ |
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39 | || !defined (__ARC_BARREL_SHIFTER__) |
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40 | |
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41 | /* Addresses are unsigned, and at 0 is the vector table, so it's OK to assume |
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42 | that we can subtract 8 from a source end address without underflow. */ |
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43 | |
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44 | ENTRY (memcmp) |
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45 | or r12,r0,r1 |
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46 | tst r12,3 |
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47 | breq r2,0,.Lnil |
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48 | add_s r3,r0,r2 |
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49 | |
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50 | /* This algorithm for big endian targets sometimes works incorrectly |
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51 | when sources are aligned. To be precise the last step is omitted. |
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52 | Just use a simple bytewise variant until the algorithm is reviewed |
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53 | and fixed. */ |
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54 | |
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55 | #ifdef __LITTLE_ENDIAN__ |
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56 | bne_s .Lbytewise |
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57 | #else /* BIG ENDIAN */ |
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58 | b_s .Lbytewise |
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59 | #endif /* ENDIAN */ |
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60 | sub r6,r3,8 |
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61 | ld r4,[r0,0] |
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62 | ld r5,[r1,0] |
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63 | 2: |
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64 | brhs r0,r6,.Loop_end |
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65 | ld_s r3,[r0,4] |
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66 | ld_s r12,[r1,4] |
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67 | brne r4,r5,.Leven |
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68 | ld.a r4,[r0,8] |
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69 | breq.d r3,r12,2b |
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70 | ld.a r5,[r1,8] |
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71 | #ifdef __LITTLE_ENDIAN__ |
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72 | mov_s r4,r3 |
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73 | b.d .Lodd |
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74 | mov_s r5,r12 |
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75 | #else /* BIG ENDIAN */ |
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76 | cmp_s r3,r12 |
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77 | j_s.d [blink] |
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78 | rrc r0,2 |
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79 | #endif /* ENDIAN */ |
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80 | |
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81 | .balign 4 |
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82 | .Loop_end: |
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83 | sub r3,r0,r6 |
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84 | brhs r3,4,.Last_cmp |
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85 | brne r4,r5,.Leven |
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86 | ld r4,[r0,4] |
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87 | ld r5,[r1,4] |
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88 | #ifdef __LITTLE_ENDIAN__ |
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89 | .balign 4 |
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90 | .Last_cmp: |
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91 | mov_l r0,24 |
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92 | add3 r2,r0,r2 |
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93 | xor r0,r4,r5 |
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94 | b.d .Leven_cmp |
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95 | bset r0,r0,r2 |
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96 | .Lodd: |
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97 | .Leven: |
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98 | xor r0,r4,r5 |
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99 | .Leven_cmp: |
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100 | mov_s r1,0x80808080 |
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101 | ; uses long immediate |
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102 | sub_s r12,r0,1 |
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103 | bic_s r0,r0,r12 |
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104 | sub r0,r1,r0 |
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105 | xor_s r0,r0,r1 |
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106 | and r1,r5,r0 |
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107 | and r0,r4,r0 |
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108 | #else /* BIG ENDIAN */ |
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109 | .Last_cmp: |
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110 | mov_s r3,0 |
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111 | sub3 r2,r3,r2 |
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112 | sub_s r3,r3,1 |
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113 | bclr r3,r3,r2 |
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114 | add_l r3,r3,1 |
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115 | and r0,r4,r3 |
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116 | and r1,r5,r3 |
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117 | .Leven: |
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118 | #endif /* ENDIAN */ |
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119 | xor.f 0,r0,r1 |
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120 | sub_s r0,r0,r1 |
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121 | j_s.d [blink] |
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122 | mov.mi r0,r1 |
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123 | .balign 4 |
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124 | .Lbytewise: |
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125 | ldb r4,[r0,0] |
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126 | ldb r5,[r1,0] |
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127 | sub r6,r3,2 |
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128 | 3: |
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129 | brhs r0,r6,.Lbyte_end |
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130 | ldb_s r3,[r0,1] |
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131 | ldb_s r12,[r1,1] |
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132 | brne r4,r5,.Lbyte_even |
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133 | ldb.a r4,[r0,2] |
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134 | breq.d r3,r12,3b |
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135 | ldb.a r5,[r1,2] |
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136 | .Lbyte_odd: |
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137 | j_s.d [blink] |
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138 | sub r0,r3,r12 |
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139 | .balign 4 |
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140 | .Lbyte_end: |
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141 | bbit1 r2,0,.Lbyte_even |
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142 | brne r4,r5,.Lbyte_even |
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143 | ldb r4,[r0,1] |
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144 | ldb r5,[r1,1] |
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145 | .Lbyte_even: |
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146 | j_s.d [blink] |
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147 | sub r0,r4,r5 |
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148 | .Lnil: |
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149 | j_s.d [blink] |
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150 | mov_s r0,0 |
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151 | ENDFUNC (memcmp) |
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152 | #endif /* __ARC601__ || !__ARC_NORM__ || !__ARC_BARREL_SHIFTER__ */ |
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153 | |
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154 | #endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */ |
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