1 | /* |
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2 | Copyright (c) 2015, Synopsys, Inc. All rights reserved. |
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3 | |
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4 | Redistribution and use in source and binary forms, with or without |
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5 | modification, are permitted provided that the following conditions are met: |
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6 | |
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7 | 1) Redistributions of source code must retain the above copyright notice, |
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8 | this list of conditions and the following disclaimer. |
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9 | |
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10 | 2) Redistributions in binary form must reproduce the above copyright notice, |
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11 | this list of conditions and the following disclaimer in the documentation |
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12 | and/or other materials provided with the distribution. |
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13 | |
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14 | 3) Neither the name of the Synopsys, Inc., nor the names of its contributors |
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15 | may be used to endorse or promote products derived from this software |
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16 | without specific prior written permission. |
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17 | |
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18 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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19 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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20 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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21 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
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22 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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23 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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24 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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25 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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26 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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27 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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28 | POSSIBILITY OF SUCH DAMAGE. |
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29 | */ |
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30 | |
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31 | /* ABI interface file |
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32 | these are the stack mappings for the registers |
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33 | as stored in the ABI for ARC */ |
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34 | |
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35 | .file "setjmp.S" |
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36 | |
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37 | ABIr13 = 0 |
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38 | ABIr14 = ABIr13 + 4 |
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39 | ABIr15 = ABIr14 + 4 |
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40 | ABIr16 = ABIr15 + 4 |
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41 | ABIr17 = ABIr16 + 4 |
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42 | ABIr18 = ABIr17 + 4 |
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43 | ABIr19 = ABIr18 + 4 |
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44 | ABIr20 = ABIr19 + 4 |
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45 | ABIr21 = ABIr20 + 4 |
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46 | ABIr22 = ABIr21 + 4 |
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47 | ABIr23 = ABIr22 + 4 |
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48 | ABIr24 = ABIr23 + 4 |
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49 | ABIr25 = ABIr24 + 4 |
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50 | ABIr26 = ABIr25 + 4 |
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51 | ABIr27 = ABIr26 + 4 |
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52 | ABIr28 = ABIr27 + 4 |
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53 | ABIr29 = ABIr28 + 4 |
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54 | ABIr30 = ABIr29 + 4 |
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55 | ABIr31 = ABIr30 + 4 |
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56 | ABIlpc = ABIr31 + 4 |
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57 | ABIlps = ABIlpc + 4 |
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58 | ABIlpe = ABIlps + 4 |
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59 | |
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60 | ABIflg = ABIlpe + 4 |
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61 | ABImlo = ABIflg + 4 |
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62 | ABImhi = ABImlo + 4 |
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63 | |
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64 | .text |
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65 | .align 4 |
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66 | .global setjmp |
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67 | .type setjmp,@function |
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68 | setjmp: |
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69 | st r13, [r0, ABIr13] |
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70 | st r14, [r0, ABIr14] |
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71 | st r15, [r0, ABIr15] |
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72 | st r16, [r0, ABIr16] |
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73 | st r17, [r0, ABIr17] |
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74 | st r18, [r0, ABIr18] |
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75 | st r19, [r0, ABIr19] |
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76 | st r20, [r0, ABIr20] |
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77 | st r21, [r0, ABIr21] |
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78 | st r22, [r0, ABIr22] |
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79 | st r23, [r0, ABIr23] |
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80 | st r24, [r0, ABIr24] |
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81 | st r25, [r0, ABIr25] |
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82 | st r26, [r0, ABIr26] |
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83 | st r27, [r0, ABIr27] |
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84 | st r28, [r0, ABIr28] |
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85 | st r29, [r0, ABIr29] |
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86 | st r30, [r0, ABIr30] |
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87 | st blink, [r0, ABIr31] |
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88 | st lp_count, [r0, ABIlpc] |
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89 | |
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90 | lr r2, [lp_start] |
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91 | lr r3, [lp_end] |
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92 | st r2, [r0, ABIlps] |
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93 | st r3, [r0, ABIlpe] |
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94 | |
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95 | #if (!defined (__ARC700__) && !defined (__ARCEM__) && !defined (__ARCHS__)) |
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96 | ; Till the configure changes are decided, and implemented, the code working on |
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97 | ; mlo/mhi and using mul64 should be disabled. |
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98 | ; st mlo, [r0, ABImlo] |
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99 | ; st mhi, [r0, ABImhi] |
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100 | lr r2, [status32] |
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101 | st r2, [r0, ABIflg] |
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102 | #endif |
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103 | |
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104 | j.d [blink] |
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105 | mov r0,0 |
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106 | .Lfe1: |
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107 | .size setjmp,.Lfe1-setjmp |
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108 | |
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109 | .align 4 |
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110 | .global longjmp |
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111 | .type longjmp,@function |
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112 | longjmp: |
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113 | |
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114 | ; load registers |
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115 | ld r13, [r0, ABIr13] |
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116 | ld r14, [r0, ABIr14] |
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117 | ld r15, [r0, ABIr15] |
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118 | ld r16, [r0, ABIr16] |
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119 | ld r17, [r0, ABIr17] |
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120 | ld r18, [r0, ABIr18] |
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121 | ld r19, [r0, ABIr19] |
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122 | ld r20, [r0, ABIr20] |
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123 | ld r21, [r0, ABIr21] |
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124 | ld r22, [r0, ABIr22] |
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125 | ld r23, [r0, ABIr23] |
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126 | ld r24, [r0, ABIr24] |
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127 | ld r25, [r0, ABIr25] |
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128 | ld r26, [r0, ABIr26] |
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129 | ld r27, [r0, ABIr27] |
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130 | ld r28, [r0, ABIr28] |
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131 | |
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132 | ld r3, [r0, ABIr29] |
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133 | mov r29, r3 |
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134 | |
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135 | ld r3, [r0, ABIr30] |
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136 | mov r30, r3 |
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137 | |
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138 | ld blink, [r0, ABIr31] |
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139 | |
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140 | ld r3, [r0, ABIlpc] |
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141 | mov lp_count, r3 |
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142 | |
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143 | ld r2, [r0, ABIlps] |
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144 | ld r3, [r0, ABIlpe] |
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145 | sr r2, [lp_start] |
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146 | sr r3, [lp_end] |
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147 | |
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148 | #if (!defined (__ARC700__) && !defined (__ARCEM__) && !defined (__ARCHS__)) |
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149 | ld r2, [r0, ABImlo] |
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150 | ld r3, [r0, ABImhi] |
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151 | ; We do not support restoring of mulhi and mlo registers, yet. |
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152 | |
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153 | ; mulu64 0,r2,1 ; restores mlo |
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154 | ; mov 0,mlo ; force multiply to finish |
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155 | ; sr r3, [mulhi] |
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156 | ld r2, [r0, ABIflg] |
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157 | flag r2 ; restore "status32" register |
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158 | #endif |
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159 | |
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160 | mov.f r1, r1 ; to avoid return 0 from longjmp |
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161 | mov.eq r1, 1 |
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162 | j.d [blink] |
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163 | mov r0,r1 |
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164 | .Lfe2: |
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165 | .size longjmp,.Lfe2-longjmp |
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