| 1 | /* |
|---|
| 2 | * Copyright (c) 2015 ARM Ltd |
|---|
| 3 | * All rights reserved. |
|---|
| 4 | * |
|---|
| 5 | * Redistribution and use in source and binary forms, with or without |
|---|
| 6 | * modification, are permitted provided that the following conditions |
|---|
| 7 | * are met: |
|---|
| 8 | * 1. Redistributions of source code must retain the above copyright |
|---|
| 9 | * notice, this list of conditions and the following disclaimer. |
|---|
| 10 | * 2. Redistributions in binary form must reproduce the above copyright |
|---|
| 11 | * notice, this list of conditions and the following disclaimer in the |
|---|
| 12 | * documentation and/or other materials provided with the distribution. |
|---|
| 13 | * 3. The name of the company may not be used to endorse or promote |
|---|
| 14 | * products derived from this software without specific prior written |
|---|
| 15 | * permission. |
|---|
| 16 | * |
|---|
| 17 | * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED |
|---|
| 18 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
|---|
| 19 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
|---|
| 20 | * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
|---|
| 21 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED |
|---|
| 22 | * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
|---|
| 23 | * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
|---|
| 24 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
|---|
| 25 | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
|---|
| 26 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
|---|
| 27 | */ |
|---|
| 28 | |
|---|
| 29 | .arm |
|---|
| 30 | .syntax unified |
|---|
| 31 | .global __aeabi_memset |
|---|
| 32 | .type __aeabi_memset, %function |
|---|
| 33 | ASM_ALIAS __aeabi_memset4 __aeabi_memset |
|---|
| 34 | ASM_ALIAS __aeabi_memset8 __aeabi_memset |
|---|
| 35 | __aeabi_memset: |
|---|
| 36 | tst r0, #3 |
|---|
| 37 | stmfd sp!, {r4, lr} |
|---|
| 38 | beq 10f |
|---|
| 39 | cmp r1, #0 |
|---|
| 40 | sub r1, r1, #1 |
|---|
| 41 | beq 9f |
|---|
| 42 | and ip, r2, #255 |
|---|
| 43 | mov r3, r0 |
|---|
| 44 | b 2f |
|---|
| 45 | 1: |
|---|
| 46 | cmp r1, #0 |
|---|
| 47 | sub r1, r1, #1 |
|---|
| 48 | beq 9f |
|---|
| 49 | 2: |
|---|
| 50 | strb ip, [r3], #1 |
|---|
| 51 | tst r3, #3 |
|---|
| 52 | bne 1b |
|---|
| 53 | 3: |
|---|
| 54 | cmp r1, #3 |
|---|
| 55 | bls 7f |
|---|
| 56 | and lr, r2, #255 |
|---|
| 57 | orr lr, lr, lr, asl #8 |
|---|
| 58 | cmp r1, #15 |
|---|
| 59 | orr lr, lr, lr, asl #16 |
|---|
| 60 | bls 5f |
|---|
| 61 | mov r4, r1 |
|---|
| 62 | add ip, r3, #16 |
|---|
| 63 | 4: |
|---|
| 64 | sub r4, r4, #16 |
|---|
| 65 | cmp r4, #15 |
|---|
| 66 | str lr, [ip, #-16] |
|---|
| 67 | str lr, [ip, #-12] |
|---|
| 68 | str lr, [ip, #-8] |
|---|
| 69 | str lr, [ip, #-4] |
|---|
| 70 | add ip, ip, #16 |
|---|
| 71 | bhi 4b |
|---|
| 72 | sub ip, r1, #16 |
|---|
| 73 | bic ip, ip, #15 |
|---|
| 74 | and r1, r1, #15 |
|---|
| 75 | add ip, ip, #16 |
|---|
| 76 | cmp r1, #3 |
|---|
| 77 | add r3, r3, ip |
|---|
| 78 | bls 7f |
|---|
| 79 | 5: |
|---|
| 80 | mov r4, r3 |
|---|
| 81 | mov ip, r1 |
|---|
| 82 | 6: |
|---|
| 83 | sub ip, ip, #4 |
|---|
| 84 | cmp ip, #3 |
|---|
| 85 | str lr, [r4], #4 |
|---|
| 86 | bhi 6b |
|---|
| 87 | sub ip, r1, #4 |
|---|
| 88 | bic ip, ip, #3 |
|---|
| 89 | add ip, ip, #4 |
|---|
| 90 | add r3, r3, ip |
|---|
| 91 | and r1, r1, #3 |
|---|
| 92 | 7: |
|---|
| 93 | cmp r1, #0 |
|---|
| 94 | andne r2, r2, #255 |
|---|
| 95 | addne r1, r3, r1 |
|---|
| 96 | beq 9f |
|---|
| 97 | 8: |
|---|
| 98 | strb r2, [r3], #1 |
|---|
| 99 | cmp r3, r1 |
|---|
| 100 | bne 8b |
|---|
| 101 | 9: |
|---|
| 102 | ldmfd sp!, {r4, lr} |
|---|
| 103 | bx lr |
|---|
| 104 | 10: |
|---|
| 105 | mov r3, r0 |
|---|
| 106 | b 3b |
|---|
| 107 | .size __aeabi_memset, . - __aeabi_memset |
|---|
