1 | /* This is a simple version of setjmp and longjmp. |
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2 | |
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3 | Nick Clifton, Cygnus Solutions, 13 June 1997. */ |
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4 | |
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5 | #include "acle-compat.h" |
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6 | |
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7 | /* ANSI concatenation macros. */ |
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8 | #define CONCAT(a, b) CONCAT2(a, b) |
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9 | #define CONCAT2(a, b) a##b |
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10 | |
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11 | #ifndef __USER_LABEL_PREFIX__ |
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12 | #error __USER_LABEL_PREFIX__ not defined |
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13 | #endif |
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14 | |
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15 | #define SYM(x) CONCAT (__USER_LABEL_PREFIX__, x) |
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16 | |
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17 | #ifdef __ELF__ |
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18 | #define TYPE(x) .type SYM(x),function |
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19 | #define SIZE(x) .size SYM(x), . - SYM(x) |
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20 | #else |
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21 | #define TYPE(x) |
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22 | #define SIZE(x) |
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23 | #endif |
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24 | |
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25 | /* Arm/Thumb interworking support: |
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26 | |
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27 | The interworking scheme expects functions to use a BX instruction |
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28 | to return control to their parent. Since we need this code to work |
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29 | in both interworked and non-interworked environments as well as with |
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30 | older processors which do not have the BX instruction we do the |
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31 | following: |
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32 | Test the return address. |
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33 | If the bottom bit is clear perform an "old style" function exit. |
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34 | (We know that we are in ARM mode and returning to an ARM mode caller). |
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35 | Otherwise use the BX instruction to perform the function exit. |
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36 | |
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37 | We know that we will never attempt to perform the BX instruction on |
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38 | an older processor, because that kind of processor will never be |
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39 | interworked, and a return address with the bottom bit set will never |
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40 | be generated. |
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41 | |
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42 | In addition, we do not actually assemble the BX instruction as this would |
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43 | require us to tell the assembler that the processor is an ARM7TDMI and |
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44 | it would store this information in the binary. We want this binary to be |
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45 | able to be linked with binaries compiled for older processors however, so |
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46 | we do not want such information stored there. |
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47 | |
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48 | If we are running using the APCS-26 convention however, then we never |
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49 | test the bottom bit, because this is part of the processor status. |
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50 | Instead we just do a normal return, since we know that we cannot be |
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51 | returning to a Thumb caller - the Thumb does not support APCS-26. |
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52 | |
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53 | Function entry is much simpler. If we are compiling for the Thumb we |
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54 | just switch into ARM mode and then drop through into the rest of the |
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55 | function. The function exit code will take care of the restore to |
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56 | Thumb mode. |
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57 | |
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58 | For Thumb-2 do everything in Thumb mode. */ |
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59 | |
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60 | #if __ARM_ARCH_ISA_THUMB == 1 && !__ARM_ARCH_ISA_ARM |
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61 | /* ARMv6-M-like has to be implemented in Thumb mode. */ |
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62 | |
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63 | .thumb |
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64 | .thumb_func |
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65 | .globl SYM (setjmp) |
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66 | TYPE (setjmp) |
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67 | SYM (setjmp): |
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68 | /* Save registers in jump buffer. */ |
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69 | stmia r0!, {r4, r5, r6, r7} |
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70 | mov r1, r8 |
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71 | mov r2, r9 |
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72 | mov r3, r10 |
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73 | mov r4, fp |
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74 | mov r5, sp |
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75 | mov r6, lr |
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76 | stmia r0!, {r1, r2, r3, r4, r5, r6} |
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77 | sub r0, r0, #40 |
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78 | /* Restore callee-saved low regs. */ |
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79 | ldmia r0!, {r4, r5, r6, r7} |
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80 | /* Return zero. */ |
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81 | mov r0, #0 |
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82 | bx lr |
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83 | |
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84 | .thumb_func |
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85 | .globl SYM (longjmp) |
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86 | TYPE (longjmp) |
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87 | SYM (longjmp): |
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88 | /* Restore High regs. */ |
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89 | add r0, r0, #16 |
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90 | ldmia r0!, {r2, r3, r4, r5, r6} |
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91 | mov r8, r2 |
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92 | mov r9, r3 |
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93 | mov r10, r4 |
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94 | mov fp, r5 |
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95 | mov sp, r6 |
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96 | ldmia r0!, {r3} /* lr */ |
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97 | /* Restore low regs. */ |
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98 | sub r0, r0, #40 |
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99 | ldmia r0!, {r4, r5, r6, r7} |
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100 | /* Return the result argument, or 1 if it is zero. */ |
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101 | mov r0, r1 |
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102 | bne 1f |
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103 | mov r0, #1 |
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104 | 1: |
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105 | bx r3 |
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106 | |
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107 | #else |
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108 | |
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109 | #ifdef __APCS_26__ |
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110 | #define RET movs pc, lr |
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111 | #elif defined(__thumb2__) |
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112 | #define RET bx lr |
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113 | #else |
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114 | #define RET tst lr, #1; \ |
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115 | moveq pc, lr ; \ |
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116 | .word 0xe12fff1e /* bx lr */ |
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117 | #endif |
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118 | |
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119 | #ifdef __thumb2__ |
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120 | .macro COND where when |
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121 | i\where \when |
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122 | .endm |
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123 | #else |
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124 | .macro COND where when |
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125 | .endm |
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126 | #endif |
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127 | |
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128 | #if defined(__thumb2__) |
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129 | .syntax unified |
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130 | .macro MODE |
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131 | .thumb |
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132 | .thumb_func |
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133 | .endm |
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134 | .macro PROLOGUE name |
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135 | .endm |
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136 | |
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137 | #elif defined(__thumb__) |
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138 | #define MODE .thumb_func |
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139 | .macro PROLOGUE name |
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140 | .code 16 |
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141 | bx pc |
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142 | nop |
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143 | .code 32 |
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144 | SYM (.arm_start_of.\name): |
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145 | .endm |
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146 | #else /* Arm */ |
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147 | #define MODE .code 32 |
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148 | .macro PROLOGUE name |
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149 | .endm |
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150 | #endif |
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151 | |
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152 | .macro FUNC_START name |
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153 | .text |
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154 | .align 2 |
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155 | MODE |
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156 | .globl SYM (\name) |
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157 | TYPE (\name) |
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158 | SYM (\name): |
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159 | PROLOGUE \name |
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160 | .endm |
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161 | |
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162 | .macro FUNC_END name |
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163 | RET |
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164 | SIZE (\name) |
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165 | .endm |
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166 | |
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167 | /* -------------------------------------------------------------------- |
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168 | int setjmp (jmp_buf); |
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169 | -------------------------------------------------------------------- */ |
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170 | |
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171 | FUNC_START setjmp |
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172 | |
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173 | /* Save all the callee-preserved registers into the jump buffer. */ |
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174 | #ifdef __thumb2__ |
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175 | mov ip, sp |
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176 | stmea a1!, { v1-v7, fp, ip, lr } |
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177 | #else |
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178 | stmea a1!, { v1-v7, fp, ip, sp, lr } |
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179 | #endif |
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180 | |
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181 | #if 0 /* Simulator does not cope with FP instructions yet. */ |
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182 | #ifndef __SOFTFP__ |
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183 | /* Save the floating point registers. */ |
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184 | sfmea f4, 4, [a1] |
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185 | #endif |
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186 | #endif |
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187 | /* When setting up the jump buffer return 0. */ |
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188 | mov a1, #0 |
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189 | |
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190 | FUNC_END setjmp |
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191 | |
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192 | /* -------------------------------------------------------------------- |
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193 | volatile void longjmp (jmp_buf, int); |
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194 | -------------------------------------------------------------------- */ |
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195 | |
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196 | FUNC_START longjmp |
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197 | |
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198 | /* If we have stack extension code it ought to be handled here. */ |
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199 | |
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200 | /* Restore the registers, retrieving the state when setjmp() was called. */ |
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201 | #ifdef __thumb2__ |
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202 | ldmfd a1!, { v1-v7, fp, ip, lr } |
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203 | mov sp, ip |
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204 | #else |
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205 | ldmfd a1!, { v1-v7, fp, ip, sp, lr } |
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206 | #endif |
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207 | |
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208 | #if 0 /* Simulator does not cope with FP instructions yet. */ |
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209 | #ifndef __SOFTFP__ |
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210 | /* Restore floating point registers as well. */ |
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211 | lfmfd f4, 4, [a1] |
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212 | #endif |
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213 | #endif |
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214 | /* Put the return value into the integer result register. |
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215 | But if it is zero then return 1 instead. */ |
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216 | movs a1, a2 |
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217 | #ifdef __thumb2__ |
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218 | it eq |
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219 | #endif |
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220 | moveq a1, #1 |
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221 | |
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222 | FUNC_END longjmp |
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223 | #endif |
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