[444] | 1 | /* |
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| 2 | * Copyright (c) 2008-2015 ARM Ltd |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * 1. Redistributions of source code must retain the above copyright |
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| 9 | * notice, this list of conditions and the following disclaimer. |
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| 10 | * 2. Redistributions in binary form must reproduce the above copyright |
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| 11 | * notice, this list of conditions and the following disclaimer in the |
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| 12 | * documentation and/or other materials provided with the distribution. |
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| 13 | * 3. The name of the company may not be used to endorse or promote |
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| 14 | * products derived from this software without specific prior written |
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| 15 | * permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED |
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| 18 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
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| 19 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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| 21 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED |
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| 22 | * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
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| 23 | * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
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| 24 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
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| 25 | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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| 26 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |
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| 29 | #include "arm_asm.h" |
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| 30 | #include <_ansi.h> |
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| 31 | #include <string.h> |
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| 32 | #include <limits.h> |
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| 33 | |
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| 34 | #if defined __OPTIMIZE_SIZE__ || defined PREFER_SIZE_OVER_SPEED |
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| 35 | #if __ARM_ARCH_ISA_THUMB == 2 |
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| 36 | /* Implemented in strlen.S. */ |
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| 37 | |
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| 38 | #elif defined (__ARM_ARCH_ISA_THUMB) |
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| 39 | /* Implemented in strlen.S. */ |
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| 40 | |
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| 41 | #else |
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| 42 | #include "../../string/strlen.c" |
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| 43 | |
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| 44 | #endif |
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| 45 | |
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| 46 | #else /* defined __OPTIMIZE_SIZE__ || defined PREFER_SIZE_OVER_SPEED */ |
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| 47 | #if defined __thumb__ && ! defined __thumb2__ |
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| 48 | #include "../../string/strlen.c" |
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| 49 | |
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| 50 | #elif __ARM_ARCH_ISA_THUMB >= 2 && defined __ARM_FEATURE_DSP |
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| 51 | /* Implemented in strlen.S. */ |
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| 52 | |
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| 53 | #else |
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| 54 | size_t __attribute__((naked)) |
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| 55 | strlen (const char* str) |
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| 56 | { |
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| 57 | asm ("len .req r0\n\t" |
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| 58 | "data .req r3\n\t" |
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| 59 | "addr .req r1\n\t" |
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| 60 | |
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| 61 | #ifdef _ISA_ARM_7 |
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| 62 | "pld [r0]\n\t" |
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| 63 | #endif |
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| 64 | /* Word-align address */ |
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| 65 | "bic addr, r0, #3\n\t" |
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| 66 | /* Get adjustment for start ... */ |
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| 67 | "ands len, r0, #3\n\t" |
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| 68 | "neg len, len\n\t" |
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| 69 | /* First word of data */ |
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| 70 | "ldr data, [addr], #4\n\t" |
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| 71 | /* Ensure bytes preceeding start ... */ |
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| 72 | "add ip, len, #4\n\t" |
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| 73 | "mov ip, ip, asl #3\n\t" |
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| 74 | "mvn r2, #0\n\t" |
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| 75 | /* ... are masked out */ |
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| 76 | #ifdef __thumb__ |
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| 77 | "itt ne\n\t" |
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| 78 | # ifdef __ARMEB__ |
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| 79 | "lslne r2, ip\n\t" |
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| 80 | # else |
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| 81 | "lsrne r2, ip\n\t" |
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| 82 | # endif |
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| 83 | "orrne data, data, r2\n\t" |
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| 84 | #else |
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| 85 | "it ne\n\t" |
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| 86 | # ifdef __ARMEB__ |
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| 87 | "orrne data, data, r2, lsl ip\n\t" |
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| 88 | # else |
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| 89 | "orrne data, data, r2, lsr ip\n\t" |
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| 90 | # endif |
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| 91 | #endif |
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| 92 | /* Magic const 0x01010101 */ |
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| 93 | #ifdef _ISA_ARM_7 |
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| 94 | "movw ip, #0x101\n\t" |
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| 95 | #else |
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| 96 | "mov ip, #0x1\n\t" |
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| 97 | "orr ip, ip, ip, lsl #8\n\t" |
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| 98 | #endif |
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| 99 | "orr ip, ip, ip, lsl #16\n" |
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| 100 | |
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| 101 | /* This is the main loop. We subtract one from each byte in |
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| 102 | the word: the sign bit changes iff the byte was zero or |
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| 103 | 0x80 -- we eliminate the latter case by anding the result |
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| 104 | with the 1-s complement of the data. */ |
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| 105 | "1:\n\t" |
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| 106 | /* test (data - 0x01010101) */ |
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| 107 | "sub r2, data, ip\n\t" |
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| 108 | /* ... & ~data */ |
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| 109 | "bic r2, r2, data\n\t" |
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| 110 | /* ... & 0x80808080 == 0? */ |
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| 111 | "ands r2, r2, ip, lsl #7\n\t" |
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| 112 | #ifdef _ISA_ARM_7 |
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| 113 | /* yes, get more data... */ |
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| 114 | "itt eq\n\t" |
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| 115 | "ldreq data, [addr], #4\n\t" |
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| 116 | /* and 4 more bytes */ |
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| 117 | "addeq len, len, #4\n\t" |
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| 118 | /* Unroll the loop a bit. */ |
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| 119 | "pld [addr, #8]\n\t" |
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| 120 | /* test (data - 0x01010101) */ |
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| 121 | "ittt eq\n\t" |
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| 122 | "subeq r2, data, ip\n\t" |
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| 123 | /* ... & ~data */ |
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| 124 | "biceq r2, r2, data\n\t" |
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| 125 | /* ... & 0x80808080 == 0? */ |
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| 126 | "andeqs r2, r2, ip, lsl #7\n\t" |
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| 127 | #endif |
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| 128 | "itt eq\n\t" |
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| 129 | /* yes, get more data... */ |
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| 130 | "ldreq data, [addr], #4\n\t" |
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| 131 | /* and 4 more bytes */ |
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| 132 | "addeq len, len, #4\n\t" |
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| 133 | "beq 1b\n\t" |
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| 134 | #ifdef __ARMEB__ |
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| 135 | "tst data, #0xff000000\n\t" |
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| 136 | "itttt ne\n\t" |
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| 137 | "addne len, len, #1\n\t" |
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| 138 | "tstne data, #0xff0000\n\t" |
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| 139 | "addne len, len, #1\n\t" |
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| 140 | "tstne data, #0xff00\n\t" |
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| 141 | "it ne\n\t" |
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| 142 | "addne len, len, #1\n\t" |
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| 143 | #else |
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| 144 | # ifdef _ISA_ARM_5 |
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| 145 | /* R2 is the residual sign bits from the above test. All we |
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| 146 | need to do now is establish the position of the first zero |
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| 147 | byte... */ |
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| 148 | /* Little-endian is harder, we need the number of trailing |
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| 149 | zeros / 8 */ |
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| 150 | # ifdef _ISA_ARM_7 |
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| 151 | "rbit r2, r2\n\t" |
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| 152 | "clz r2, r2\n\t" |
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| 153 | # else |
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| 154 | "rsb r1, r2, #0\n\t" |
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| 155 | "and r2, r2, r1\n\t" |
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| 156 | "clz r2, r2\n\t" |
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| 157 | "rsb r2, r2, #31\n\t" |
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| 158 | # endif |
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| 159 | "add len, len, r2, lsr #3\n\t" |
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| 160 | # else /* No CLZ instruction */ |
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| 161 | "tst data, #0xff\n\t" |
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| 162 | "itttt ne\n\t" |
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| 163 | "addne len, len, #1\n\t" |
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| 164 | "tstne data, #0xff00\n\t" |
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| 165 | "addne len, len, #1\n\t" |
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| 166 | "tstne data, #0xff0000\n\t" |
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| 167 | "it ne\n\t" |
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| 168 | "addne len, len, #1\n\t" |
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| 169 | # endif |
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| 170 | #endif |
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| 171 | "bx lr\n\t"); |
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| 172 | } |
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| 173 | #endif |
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| 174 | #endif |
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