1 | /* A memcpy for CRIS. |
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2 | Copyright (C) 1994-2005 Axis Communications. |
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3 | All rights reserved. |
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4 | |
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5 | Redistribution and use in source and binary forms, with or without |
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6 | modification, are permitted provided that the following conditions |
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7 | are met: |
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8 | |
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9 | 1. Redistributions of source code must retain the above copyright |
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10 | notice, this list of conditions and the following disclaimer. |
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11 | |
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12 | 2. Neither the name of Axis Communications nor the names of its |
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13 | contributors may be used to endorse or promote products derived |
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14 | from this software without specific prior written permission. |
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15 | |
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16 | THIS SOFTWARE IS PROVIDED BY AXIS COMMUNICATIONS AND ITS CONTRIBUTORS |
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17 | ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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18 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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19 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL AXIS |
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20 | COMMUNICATIONS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, |
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21 | INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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22 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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23 | SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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24 | HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
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25 | STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING |
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26 | IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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27 | POSSIBILITY OF SUCH DAMAGE. */ |
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28 | |
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29 | /* FIXME: This file should really only be used for reference, as the |
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30 | result is somewhat depending on gcc generating what we expect rather |
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31 | than what we describe. An assembly file should be used instead. */ |
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32 | |
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33 | #include <stddef.h> |
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34 | |
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35 | /* Break even between movem and move16 is really at 38.7 * 2, but |
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36 | modulo 44, so up to the next multiple of 44, we use ordinary code. */ |
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37 | #define MEMCPY_BY_BLOCK_THRESHOLD (44 * 2) |
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38 | |
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39 | /* No name ambiguities in this file. */ |
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40 | __asm__ (".syntax no_register_prefix"); |
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41 | |
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42 | void * |
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43 | memcpy(void *__restrict pdst, const void *__restrict psrc, size_t pn) |
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44 | { |
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45 | /* Now we want the parameters put in special registers. |
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46 | Make sure the compiler is able to make something useful of this. |
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47 | As it is now: r10 -> r13; r11 -> r11 (nop); r12 -> r12 (nop). |
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48 | |
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49 | If gcc was allright, it really would need no temporaries, and no |
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50 | stack space to save stuff on. */ |
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51 | |
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52 | register void *return_dst __asm__ ("r10") = pdst; |
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53 | register unsigned char *dst __asm__ ("r13") = pdst; |
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54 | register unsigned const char *src __asm__ ("r11") = psrc; |
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55 | register int n __asm__ ("r12") = pn; |
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56 | |
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57 | /* When src is aligned but not dst, this makes a few extra needless |
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58 | cycles. I believe it would take as many to check that the |
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59 | re-alignment was unnecessary. */ |
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60 | if (((unsigned long) dst & 3) != 0 |
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61 | /* Don't align if we wouldn't copy more than a few bytes; so we |
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62 | don't have to check further for overflows. */ |
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63 | && n >= 3) |
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64 | { |
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65 | if ((unsigned long) dst & 1) |
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66 | { |
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67 | n--; |
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68 | *dst = *src; |
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69 | src++; |
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70 | dst++; |
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71 | } |
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72 | |
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73 | if ((unsigned long) dst & 2) |
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74 | { |
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75 | n -= 2; |
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76 | *(short *) dst = *(short *) src; |
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77 | src += 2; |
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78 | dst += 2; |
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79 | } |
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80 | } |
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81 | |
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82 | /* Decide which copying method to use. */ |
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83 | if (n >= MEMCPY_BY_BLOCK_THRESHOLD) |
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84 | { |
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85 | /* It is not optimal to tell the compiler about clobbering any |
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86 | registers; that will move the saving/restoring of those registers |
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87 | to the function prologue/epilogue, and make non-movem sizes |
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88 | suboptimal. */ |
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89 | __asm__ volatile |
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90 | ("\ |
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91 | ;; GCC does promise correct register allocations, but let's \n\ |
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92 | ;; make sure it keeps its promises. \n\ |
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93 | .ifnc %0-%1-%2,$r13-$r11-$r12 \n\ |
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94 | .error \"GCC reg alloc bug: %0-%1-%4 != $r13-$r12-$r11\" \n\ |
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95 | .endif \n\ |
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96 | \n\ |
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97 | ;; Save the registers we'll use in the movem process \n\ |
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98 | ;; on the stack. \n\ |
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99 | subq 11*4,sp \n\ |
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100 | movem r10,[sp] \n\ |
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101 | \n\ |
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102 | ;; Now we've got this: \n\ |
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103 | ;; r11 - src \n\ |
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104 | ;; r13 - dst \n\ |
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105 | ;; r12 - n \n\ |
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106 | \n\ |
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107 | ;; Update n for the first loop. \n\ |
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108 | subq 44,r12 \n\ |
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109 | 0: \n\ |
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110 | " |
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111 | #ifdef __arch_common_v10_v32 |
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112 | /* Cater to branch offset difference between v32 and v10. We |
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113 | assume the branch below has an 8-bit offset. */ |
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114 | " setf\n" |
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115 | #endif |
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116 | " movem [r11+],r10 \n\ |
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117 | subq 44,r12 \n\ |
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118 | bge 0b \n\ |
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119 | movem r10,[r13+] \n\ |
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120 | \n\ |
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121 | ;; Compensate for last loop underflowing n. \n\ |
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122 | addq 44,r12 \n\ |
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123 | \n\ |
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124 | ;; Restore registers from stack. \n\ |
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125 | movem [sp+],r10" |
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126 | |
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127 | /* Outputs. */ |
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128 | : "=r" (dst), "=r" (src), "=r" (n) |
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129 | |
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130 | /* Inputs. */ |
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131 | : "0" (dst), "1" (src), "2" (n)); |
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132 | } |
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133 | |
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134 | while (n >= 16) |
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135 | { |
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136 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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137 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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138 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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139 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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140 | |
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141 | n -= 16; |
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142 | } |
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143 | |
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144 | switch (n) |
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145 | { |
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146 | case 0: |
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147 | break; |
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148 | |
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149 | case 1: |
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150 | *dst = *src; |
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151 | break; |
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152 | |
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153 | case 2: |
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154 | *(short *) dst = *(short *) src; |
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155 | break; |
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156 | |
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157 | case 3: |
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158 | *(short *) dst = *(short *) src; dst += 2; src += 2; |
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159 | *dst = *src; |
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160 | break; |
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161 | |
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162 | case 4: |
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163 | *(long *) dst = *(long *) src; |
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164 | break; |
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165 | |
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166 | case 5: |
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167 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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168 | *dst = *src; |
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169 | break; |
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170 | |
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171 | case 6: |
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172 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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173 | *(short *) dst = *(short *) src; |
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174 | break; |
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175 | |
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176 | case 7: |
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177 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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178 | *(short *) dst = *(short *) src; dst += 2; src += 2; |
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179 | *dst = *src; |
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180 | break; |
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181 | |
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182 | case 8: |
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183 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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184 | *(long *) dst = *(long *) src; |
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185 | break; |
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186 | |
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187 | case 9: |
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188 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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189 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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190 | *dst = *src; |
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191 | break; |
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192 | |
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193 | case 10: |
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194 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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195 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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196 | *(short *) dst = *(short *) src; |
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197 | break; |
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198 | |
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199 | case 11: |
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200 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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201 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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202 | *(short *) dst = *(short *) src; dst += 2; src += 2; |
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203 | *dst = *src; |
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204 | break; |
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205 | |
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206 | case 12: |
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207 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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208 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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209 | *(long *) dst = *(long *) src; |
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210 | break; |
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211 | |
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212 | case 13: |
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213 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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214 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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215 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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216 | *dst = *src; |
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217 | break; |
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218 | |
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219 | case 14: |
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220 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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221 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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222 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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223 | *(short *) dst = *(short *) src; |
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224 | break; |
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225 | |
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226 | case 15: |
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227 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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228 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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229 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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230 | *(short *) dst = *(short *) src; dst += 2; src += 2; |
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231 | *dst = *src; |
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232 | break; |
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233 | } |
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234 | |
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235 | return return_dst; |
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236 | } |
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