1 | /* |
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2 | * Copyright (c) 1996-2007 MIPS Technologies, Inc. |
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3 | * Copyright (C) 2009 CodeSourcery, LLC. |
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4 | * |
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5 | * All rights reserved. |
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6 | * |
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7 | * Redistribution and use in source and binary forms, with or without |
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8 | * modification, are permitted provided that the following conditions |
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9 | * are met: |
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10 | * |
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11 | * * Redistributions of source code must retain the above copyright |
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12 | * notice, this list of conditions and the following disclaimer. |
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13 | * * Redistributions in binary form must reproduce the above |
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14 | * copyright |
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15 | * notice, this list of conditions and the following disclaimer |
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16 | * in the documentation and/or other materials provided with |
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17 | * the distribution. |
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18 | * * Neither the name of MIPS Technologies Inc. nor the names of its |
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19 | * contributors may be used to endorse or promote products derived |
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20 | * from this software without specific prior written permission. |
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21 | * |
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22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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23 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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24 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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25 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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26 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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27 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
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28 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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29 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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30 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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31 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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32 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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33 | */ |
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34 | |
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35 | /* |
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36 | * regdef.h : MIPS Rx000 symbolic register names for assembler |
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37 | */ |
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38 | |
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39 | #ifndef _MIPS_REGDEF_H_ |
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40 | #define _MIPS_REGDEF_H_ |
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41 | |
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42 | #define zero $0 |
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43 | |
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44 | #define AT $1 |
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45 | |
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46 | #define v0 $2 |
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47 | #define v1 $3 |
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48 | |
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49 | #define a0 $4 |
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50 | #define a1 $5 |
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51 | #define a2 $6 |
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52 | #define a3 $7 |
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53 | |
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54 | #if _MIPS_SIM==_ABIN32 || _MIPS_SIM==_ABI64 || _MIPS_SIM==_ABIEABI |
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55 | #define a4 $8 |
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56 | #define a5 $9 |
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57 | #define a6 $10 |
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58 | #define a7 $11 |
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59 | #define t0 $12 |
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60 | #define t1 $13 |
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61 | #define t2 $14 |
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62 | #define t3 $15 |
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63 | #define ta0 $8 /* alias for $a4 */ |
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64 | #define ta1 $9 /* alias for $a5 */ |
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65 | #define ta2 $10 /* alias for $a6 */ |
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66 | #define ta3 $11 /* alias for $a7 */ |
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67 | #else |
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68 | #define t0 $8 |
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69 | #define t1 $9 |
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70 | #define t2 $10 |
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71 | #define t3 $11 |
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72 | #define t4 $12 |
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73 | #define t5 $13 |
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74 | #define t6 $14 |
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75 | #define t7 $15 |
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76 | #define ta0 $12 /* alias for $t4 */ |
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77 | #define ta1 $13 /* alias for $t5 */ |
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78 | #define ta2 $14 /* alias for $t6 */ |
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79 | #define ta3 $15 /* alias for $t7 */ |
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80 | #endif |
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81 | |
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82 | #define s0 $16 |
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83 | #define s1 $17 |
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84 | #define s2 $18 |
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85 | #define s3 $19 |
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86 | #define s4 $20 |
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87 | #define s5 $21 |
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88 | #define s6 $22 |
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89 | #define s7 $23 |
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90 | #define s8 $30 /* == fp */ |
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91 | |
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92 | #define t8 $24 |
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93 | #define t9 $25 |
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94 | #define k0 $26 |
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95 | #define k1 $27 |
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96 | |
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97 | #define gp $28 |
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98 | |
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99 | #define sp $29 |
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100 | #define fp $30 |
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101 | #define ra $31 |
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102 | |
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103 | #endif |
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