[1] | 1 | /////////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File : boot_hba_driver.c |
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| 3 | // Date : 18/01/2017 |
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| 4 | // Author : Alain Greiner / Vu Son |
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| 5 | // Copyright (c) UPMC-LIP6 |
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| 6 | /////////////////////////////////////////////////////////////////////////////////// |
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| 7 | |
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| 8 | #include <boot_config.h> |
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| 9 | #include <boot_hba_driver.h> |
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| 10 | #include <boot_mmc_driver.h> |
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| 11 | #include <boot_utils.h> |
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| 12 | |
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| 13 | #ifndef SEG_IOC_BASE |
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| 14 | # error "The SEG_IOC_BASE value should be defined in the 'hard_config.h' file" |
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| 15 | #endif |
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| 16 | |
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| 17 | #ifndef IO_CXY |
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| 18 | # error "The IO_CXY value should be defined in the 'boot_config.h' file" |
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| 19 | #endif |
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| 20 | |
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| 21 | |
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| 22 | /**************************************************************************** |
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| 23 | * Global variables. * |
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| 24 | ****************************************************************************/ |
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| 25 | |
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| 26 | uint32_t hba_allocated_cmd[32]; /* State of each command slot (0 if |
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| 27 | slot is available for use). */ |
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| 28 | |
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| 29 | hba_cmd_desc_t hba_cmd_list[32] /* Command List (up to 32 |
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| 30 | commands). */ |
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| 31 | __attribute__((aligned(0x40))); |
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| 32 | |
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| 33 | hba_cmd_table_t hba_cmd_table[32] /* Command Tables array (one |
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| 34 | Command Table for each Command |
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| 35 | List entry). */ |
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| 36 | __attribute__((aligned(0x40))); |
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| 37 | |
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| 38 | /**************************************************************************** |
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| 39 | * Internal functions. * |
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| 40 | ****************************************************************************/ |
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| 41 | |
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| 42 | /**************************************************************************** |
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| 43 | * This function returns the value of an HBA register. * |
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| 44 | * @ reg : HBA register to be read. * |
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| 45 | * @ returns the value stored in reg. * |
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| 46 | ****************************************************************************/ |
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| 47 | static uint32_t boot_hba_get_register(uint32_t reg) |
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| 48 | { |
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| 49 | cxy_t cxy = IO_CXY; |
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| 50 | uint32_t * ptr = (uint32_t *)SEG_IOC_BASE + reg; |
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| 51 | |
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| 52 | return boot_remote_lw( XPTR( cxy , ptr ) ); |
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| 53 | |
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| 54 | } // boot_hba_get_register() |
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| 55 | |
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| 56 | /**************************************************************************** |
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| 57 | * This function sets a new value to an HBA register. * |
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| 58 | * @ reg : HBA register to be configured. * |
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| 59 | * @ val : new value to be written to 'reg'. * |
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| 60 | ****************************************************************************/ |
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| 61 | void boot_hba_set_register(uint32_t reg, uint32_t val) |
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| 62 | { |
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| 63 | cxy_t cxy = IO_CXY; |
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| 64 | uint32_t * ptr = (uint32_t *)SEG_IOC_BASE + reg; |
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| 65 | |
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| 66 | boot_remote_sw( XPTR( cxy , ptr ) , val ); |
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| 67 | |
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| 68 | } // boot_hba_set_register() |
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| 69 | |
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| 70 | /**************************************************************************** |
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| 71 | * This function allocates an unused command index. * |
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| 72 | * @ returns command index (0 to 31) / returns -1 if not found * |
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| 73 | ****************************************************************************/ |
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| 74 | static int boot_hba_cmd_alloc() |
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| 75 | { |
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| 76 | uint32_t i; |
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| 77 | uint32_t cmd_id; |
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| 78 | |
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| 79 | // loop on the state array to find an unused slot |
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| 80 | cmd_id = -1; |
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| 81 | for (i = 0; i < 32; i++) |
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| 82 | { |
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| 83 | if (hba_allocated_cmd[i] == 0) |
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| 84 | { |
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| 85 | cmd_id = i; |
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| 86 | break; |
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| 87 | } |
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| 88 | } |
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| 89 | |
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| 90 | return cmd_id; |
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| 91 | |
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| 92 | } // boot_hba_cmd_alloc() |
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| 93 | |
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| 94 | /**************************************************************************** |
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| 95 | * This function releases the 'cmd_id' command index by resetting its * |
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| 96 | * corresponding entry in the state array. * |
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| 97 | * @ returns 0 on success, -1 on error. * |
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| 98 | ****************************************************************************/ |
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| 99 | static int boot_hba_cmd_release(uint32_t cmd_id) |
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| 100 | { |
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| 101 | // check slot allocated |
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| 102 | if (hba_allocated_cmd[cmd_id] == 0) |
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| 103 | { |
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| 104 | boot_printf("\n[BOOT ERROR] boot_hba_cmd_release(): " |
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| 105 | "Command %d to be released is not allocated\n", |
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| 106 | cmd_id |
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| 107 | ); |
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| 108 | return -1; |
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| 109 | } |
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| 110 | |
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| 111 | // Reset entry in state array |
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| 112 | hba_allocated_cmd[cmd_id] = 0; |
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| 113 | |
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| 114 | return 0; |
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| 115 | } |
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| 116 | |
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| 117 | /**************************************************************************** |
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| 118 | * Driver API functions. * |
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| 119 | ****************************************************************************/ |
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| 120 | |
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| 121 | /////////////////// |
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| 122 | int boot_hba_init() |
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| 123 | { |
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| 124 | uint64_t cmd_table_addr; // Command Table physical base address |
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| 125 | uint64_t cmd_list_addr; // Command List physical base address |
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| 126 | uint64_t paddr; // Command Table physical address |
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| 127 | uint32_t i; // Iterator for the initialization loop |
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| 128 | |
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| 129 | /* Getting the Command List and Command Table base addresses. */ |
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| 130 | cmd_table_addr = (uint64_t)(intptr_t)&hba_cmd_table[0]; |
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| 131 | cmd_list_addr = (uint64_t)(intptr_t)&hba_cmd_list[0]; |
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| 132 | |
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| 133 | /* Initializing the Command List. */ |
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| 134 | for (i = 0; i < 32; i++) |
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| 135 | { |
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| 136 | paddr = cmd_table_addr + i * sizeof(hba_cmd_table_t); |
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| 137 | hba_cmd_list[i].ctba = (uint32_t)paddr; |
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| 138 | hba_cmd_list[i].ctbau = (uint32_t)(paddr >> 32); |
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| 139 | hba_allocated_cmd[i] = 0; |
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| 140 | } |
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| 141 | |
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| 142 | /* Initializing the HBA registers. */ |
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| 143 | boot_hba_set_register( HBA_PXCLB , (uint32_t)cmd_list_addr ); |
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| 144 | boot_hba_set_register( HBA_PXCLBU, (uint32_t)(cmd_list_addr >> 32) ); |
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| 145 | boot_hba_set_register( HBA_PXIS , 0 ); |
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| 146 | boot_hba_set_register( HBA_PXIE , 0 ); |
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| 147 | boot_hba_set_register( HBA_PXCI , 0 ); |
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| 148 | boot_hba_set_register( HBA_PXCMD , 1 ); |
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| 149 | |
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| 150 | return 0; |
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| 151 | |
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| 152 | } // boot_hba_init() |
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| 153 | |
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| 154 | /////////////////////////////////// |
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| 155 | int boot_hba_access( uint32_t lba, |
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| 156 | xptr_t buf_paddr, |
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| 157 | uint32_t count ) |
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| 158 | { |
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| 159 | uint32_t cmd_id; |
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| 160 | uint32_t pxci; |
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| 161 | uint32_t pxis; |
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| 162 | hba_cmd_desc_t * cmd_desc; |
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| 163 | hba_cmd_table_t * cmd_table; |
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| 164 | |
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| 165 | // get target buffer cluster and pointer |
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| 166 | cxy_t buf_cxy = GET_CXY( buf_paddr ); |
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| 167 | uint32_t buf_ptr = (uint32_t)GET_PTR( buf_paddr ); |
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| 168 | |
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| 169 | // Check buffer address alignment |
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| 170 | if (buf_ptr & 0x3F) |
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| 171 | { |
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| 172 | boot_puts("\n[BOOT ERROR] boot_hba_access(): " |
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| 173 | "Buffer address is not cache-line-size-aligned\n"); |
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| 174 | return -1; |
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| 175 | } |
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| 176 | |
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| 177 | // Get a free slot in the Command List |
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| 178 | cmd_id = boot_hba_cmd_alloc(); |
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| 179 | |
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| 180 | // Initialize pointers |
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| 181 | cmd_desc = &hba_cmd_list[cmd_id]; |
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| 182 | cmd_table = &hba_cmd_table[cmd_id]; |
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| 183 | |
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| 184 | // Set the buffer descriptor of the Command Table |
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| 185 | cmd_table->buffer.dba = buf_ptr; |
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| 186 | cmd_table->buffer.dbau = buf_cxy; |
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| 187 | cmd_table->buffer.dbc = count * 512; |
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| 188 | |
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| 189 | // Initialize the Command Table header |
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| 190 | cmd_table->header.lba0 = (char)lba; |
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| 191 | cmd_table->header.lba1 = (char)(lba >> 8); |
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| 192 | cmd_table->header.lba2 = (char)(lba >> 16); |
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| 193 | cmd_table->header.lba3 = (char)(lba >> 24); |
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| 194 | cmd_table->header.lba4 = 0; |
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| 195 | cmd_table->header.lba5 = 0; |
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| 196 | |
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| 197 | // Initialize the Command Descriptor |
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| 198 | cmd_desc->prdtl[0] = 1; |
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| 199 | cmd_desc->prdtl[1] = 0; |
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| 200 | cmd_desc->flag[0] = 0x00; |
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| 201 | |
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| 202 | #if USE_IOB // software L2/L3 cache coherence |
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| 203 | if( boot_mmc_inval( buf_paddr, count<<9 ) ) return -1; |
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| 204 | #endif |
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| 205 | |
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| 206 | // Launch data transfer |
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| 207 | boot_hba_set_register(HBA_PXCI, (1 << cmd_id)); |
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| 208 | |
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| 209 | #if DEBUG_BOOT_IOC |
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| 210 | boot_printf("\n[BOOT] boot_hba_access(): Transfer launched at cycle %d\n" |
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| 211 | " lba = %d / buf = %l / nblocks = %d\n", |
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| 212 | boot_get_proctime() , lba , buf_paddr , count ); |
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| 213 | #endif |
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| 214 | |
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| 215 | // Wait transfer completion |
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| 216 | do |
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| 217 | { |
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| 218 | pxci = boot_hba_get_register(HBA_PXCI); |
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| 219 | |
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| 220 | } while (pxci & (1 << cmd_id)); |
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| 221 | |
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| 222 | // Get error status then reset it |
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| 223 | pxis = boot_hba_get_register(HBA_PXIS); |
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| 224 | boot_hba_set_register(HBA_PXIS, 0); |
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| 225 | |
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| 226 | #if DEBUG_BOOT_IOC |
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| 227 | boot_printf("\n[BOOT] boot_hba_access(): Transfer terminated at cycle %d\n", |
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| 228 | boot_get_proctime()); |
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| 229 | #endif |
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| 230 | |
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| 231 | if (boot_hba_cmd_release(cmd_id)) |
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| 232 | return -1; |
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| 233 | else if (pxis & 0x40000000) |
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| 234 | return pxis; |
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| 235 | else |
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| 236 | return 0; |
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| 237 | |
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| 238 | } // boot_hba_access() |
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