Index: trunk/tools/arch_info/arch_classes.py
===================================================================
--- trunk/tools/arch_info/arch_classes.py	(revision 690)
+++ trunk/tools/arch_info/arch_classes.py	(revision 1)
@@ -13,5 +13,5 @@
 #  It handle 4 types of objects: clusters, cores, devices and irqs.
 #  - The number of cluster is variable (can be one). 
-#  - The cluster topology can be a 2D mesh or a simple 1D array.
+#  - The cluster topology can be a 2D mesh or a simpla array.
 #  - The number of cores per cluster is variable (can be zero). 
 #  - The number of addressable devices per cluster is variable.
@@ -41,52 +41,56 @@
 #########################################################################################
 # These arrays define the supported types of peripherals.
-# They must be kept consistent with values defined in file arch_info.h 
+# They must be kept consistent with values defined in file arch_info.h.
 #########################################################################################
 
 DEVICE_TYPES_STR = [
-    'RAM_SCL',         # 0.0
-    'ROM_SCL',         # 1.0
-    'FBF_SCL',         # 2.0
-    'FBF_LTI',         # 2.1
-    'IOB_TSR',         # 3.0
-    'IOC_BDV',         # 4.0
-    'IOC_HBA',         # 4.1
-    'IOC_SDC',         # 4.2
-    'IOC_SPI',         # 4.3
-    'IOC_RDK',         # 4.4
-    'MMC_TSR',         # 5.0
-    'DMA_SCL',         # 6.0
-    'NIC_CBF',         # 7.0
-    'TIM_SCL',         # 8.0
-    'TXT_TTY',         # 9.0
-    'TXT_RS2',         # 9.1
-    'TXT_MTY',         # 9.2
-    'ICU_XCU',         # A.0
-    'PIC_TSR',         # B.0
+    'RAM',             # 0
+    'DMA',             # 1
+    'FBF',             # 1
+    'IOB',             # 3
+    'IOC_BDV',         # 4
+    'IOC_HBA',         # 5
+    'IOC_SDC',         # 6
+    'IOC_SPI',         # 7
+    'IOC_RDK',         # 8
+    'MMC',             # 9
+    'MWR_CPY',         # 10
+    'MWR_GCD',         # 11
+    'MWR_DCT',         # 12
+    'NIC',             # 13
+    'ROM',             # 14
+    'SIM',             # 15
+    'TIM',             # 16
+    'TTY',             # 17
+    'XCU',             # 18
+    'PIC',             # 19
+    'CMA',             # 20
     ]
    
 DEVICE_TYPES_INT = [
-    0x00000000,        # 0.0
-    0x00010000,        # 1.0
-    0x00020000,        # 2.0
-    0x00020001,        # 2.1
-    0x00030000,        # 3.0
-    0x00040000,        # 4.0
-    0x00040001,        # 4.1
-    0x00040002,        # 4.2
-    0x00040003,        # 4.3
-    0x00040004,        # 4.4
-    0x00050000,        # 5.0
-    0x00060000,        # 6.0
-    0x00070000,        # 7.0
-    0x00080000,        # 8.0
-    0x00090000,        # 9.0
-    0x00090001,        # 9.1
-    0x00090002,        # 9.2
-    0x000A0000,        # A.0
-    0x000B0000,        # B.0
+    0x00000000,        # 0
+    0x00010000,        # 1
+    0x00020000,        # 1
+    0x00030000,        # 3
+    0x00040000,        # 4
+    0x00040001,        # 5
+    0x00040002,        # 6
+    0x00040003,        # 7
+    0x00040004,        # 8
+    0x00050000,        # 9
+    0x00060000,        # 10
+    0x00060001,        # 11
+    0x00060002,        # 12
+    0x00070000,        # 13
+    0x00080000,        # 14
+    0x00090000,        # 15
+    0x000A0000,        # 16
+    0x000B0000,        # 17
+    0x000C0000,        # 18
+    0x000D0000,        # 19
+    0x000E0000,        # 20
     ]
 
-#########################################################################################
+ #########################################################################################
 class Archinfo( object ):          
 #########################################################################################
@@ -100,11 +104,10 @@
                   x_width,           # number of bits for x coordinate
                   y_width,           # number of bits for y coordinate
-                  irqs_per_core,     # number or IRQs from ICU to one core 
+                  irqs_per_core,     # number or IRQs from XCU to one core 
                   io_cxy,            # IO cluster identifier
                   boot_cxy,          # boot cluster identifier
                   cache_line,        # number of bytes in cache line
                   reset_address,     # Preloader physical base address
-                  p_width,           # TSAR specific : number of bits to code core lid
-                  sys_clk ):         # system clock frequency (in Hertz)
+                  p_width ):         # TSAR specific : number of bits to code core lid
 
         assert ( x_size <= (1<<x_width) )
@@ -126,5 +129,4 @@
         self.reset_address  = reset_address
         self.p_width        = p_width
-        self.sys_clk        = sys_clk
 
         self.total_cores    = 0
@@ -184,5 +186,5 @@
     ################################   add an input IRQ in a device
     def addIrq( self,
-                dstdev,                # destination device (PIC or ICU)
+                dstdev,                # destination device (PIC or XCU)
                 port,                  # input IRQ port index
                 srcdev,                # source device
@@ -190,5 +192,5 @@
                 is_rx = False ):       # I/O operation direction
 
-        assert (dstdev.ptype == 'ICU_XCU') or (dstdev.ptype == 'PIC_TSR')
+        assert (dstdev.ptype == 'XCU') or (dstdev.ptype == 'PIC')
         assert (port < dstdev.arg0)
 
@@ -275,6 +277,5 @@
         s += '           y_size       = "%d"\n'   % (self.y_size)
         s += '           cores        = "%d"\n'   % (self.cores_max)
-        s += '           io_cxy       = "%d"\n'   % (self.io_cxy)
-        s += '           sys_clk      = "%d" >\n' % (self.sys_clk)
+        s += '           io_cxy       = "%d" >\n' % (self.io_cxy)
         s += '\n'
 
@@ -312,5 +313,5 @@
         byte_stream += self.int2bytes(4,  self.irqs_per_core)
         byte_stream += self.int2bytes(4,  self.cache_line)
-        byte_stream += self.int2bytes(4,  self.sys_clk)
+        byte_stream += self.int2bytes(4,  0)
 
         byte_stream += self.str2bytes(64, self.name)
@@ -371,5 +372,5 @@
                                  # required by
                                  # - top.cpp compilation
-                                 # - almos-mkh bootloader compilation
+                                 # - almos-mk bootloader compilation
                                  # - tsar_preloader compilation
 
@@ -381,8 +382,13 @@
         ram_size     = 0
 
-        nb_rom       = 0
-        rom_channels = 0
-        rom_base     = 0xFFFFFFFFFFFFFFFF
-        rom_size     = 0
+        nb_cma       = 0
+        cma_channels = 0
+        cma_base     = 0xFFFFFFFFFFFFFFFF
+        cma_size     = 0
+
+        nb_dma       = 0
+        dma_channels = 0
+        dma_base     = 0xFFFFFFFFFFFFFFFF
+        dma_size     = 0
 
         nb_fbf       = 0
@@ -392,6 +398,4 @@
         fbf_arg0     = 0
         fbf_arg1     = 0
-        use_fbf_scl  = False
-        use_fbf_lti  = False
 
         nb_iob       = 0
@@ -415,8 +419,15 @@
         mmc_size     = 0
 
-        nb_dma       = 0
-        dma_channels = 0
-        dma_base     = 0xFFFFFFFFFFFFFFFF
-        dma_size     = 0
+        nb_mwr       = 0
+        mwr_channels = 0
+        mwr_base     = 0xFFFFFFFFFFFFFFFF
+        mwr_size     = 0
+        mwr_arg0     = 0
+        mwr_arg1     = 0
+        mwr_arg2     = 0
+        mwr_arg3     = 0
+        use_mwr_gcd  = False
+        use_mwr_dct  = False
+        use_mwr_cpy  = False
 
         nb_nic       = 0
@@ -425,4 +436,14 @@
         nic_size     = 0
 
+        nb_pic       = 0
+        pic_channels = 0
+        pic_base     = 0xFFFFFFFFFFFFFFFF
+        pic_size     = 0
+
+        nb_rom       = 0
+        rom_channels = 0
+        rom_base     = 0xFFFFFFFFFFFFFFFF
+        rom_size     = 0
+
         nb_sim       = 0
         sim_channels = 0
@@ -435,27 +456,19 @@
         tim_size     = 0
 
-        nb_txt       = 0
-        txt_channels = 0
-        txt_base     = 0xFFFFFFFFFFFFFFFF
-        txt_size     = 0
-        use_txt_tty  = False
-        use_txt_rs2  = False
-        use_txt_mty  = False
-
-        nb_icu       = 0
-        icu_channels = 0
-        icu_base     = 0xFFFFFFFFFFFFFFFF
-        icu_size     = 0
-        icu_arg0     = 0
-
-        nb_pic       = 0
-        pic_channels = 0
-        pic_base     = 0xFFFFFFFFFFFFFFFF
-        pic_size     = 0
-
-        nb_rom        = 0
-        rom_channels  = 0
-        rom_base      = 0xFFFFFFFFFFFFFFFF
-        rom_size      = 0
+        nb_tty       = 0
+        tty_channels = 0
+        tty_base     = 0xFFFFFFFFFFFFFFFF
+        tty_size     = 0
+
+        nb_xcu       = 0
+        xcu_channels = 0
+        xcu_base     = 0xFFFFFFFFFFFFFFFF
+        xcu_size     = 0
+        xcu_arg0     = 0
+
+        nb_drom       = 0
+        drom_channels = 0
+        drom_base     = 0xFFFFFFFFFFFFFFFF
+        drom_size     = 0
 
         # get devices attributes
@@ -463,5 +476,5 @@
             for device in cluster.devices:
 
-                if ( device.ptype == 'RAM_SCL' ):
+                if ( device.ptype == 'RAM' ):
                     ram_base     = device.base
                     ram_size     = device.size
@@ -469,28 +482,25 @@
                     nb_ram +=1
                 
-                elif ( device.ptype == 'ROM_SCL' ):
-                    rom_base     = device.base
-                    rom_size     = device.size
-                    rom_channels = device.channels
-                    nb_rom +=1
-
-                elif ( device.ptype == 'FBF_SCL' ):
+                elif ( device.ptype == 'CMA' ):
+                    cma_base     = device.base
+                    cma_size     = device.size
+                    cma_channels = device.channels
+                    nb_cma +=1
+
+                elif ( device.ptype == 'DMA' ):
+                    dma_base     = device.base
+                    dma_size     = device.size
+                    dma_channels = device.channels
+                    nb_dma +=1
+
+                elif ( device.ptype == 'FBF' ):
                     fbf_base     = device.base
                     fbf_size     = device.size
                     fbf_channels = device.channels
-                    use_fbf_scl  = True
                     fbf_arg0     = device.arg0
                     fbf_arg1     = device.arg1
                     nb_fbf +=1
-                elif ( device.ptype == 'FBF_LTI' ):
-                    fbf_base     = device.base
-                    fbf_size     = device.size
-                    fbf_channels = device.channels
-                    use_fbf_lti  = True
-                    fbf_arg0     = device.arg0
-                    fbf_arg1     = device.arg1
-                    nb_fbf +=1
-
-                elif ( device.ptype == 'IOB_TSR' ):
+
+                elif ( device.ptype == 'IOB' ):
                     iob_base     = device.base
                     iob_size     = device.size
@@ -522,4 +532,5 @@
                     use_ioc_spi  = True
                     nb_ioc += 1
+
                 elif ( device.ptype == 'IOC_RDK' ):
                     ioc_base     = device.base
@@ -529,5 +540,5 @@
                     nb_ioc += 1
 
-                elif ( device.ptype == 'MMC_TSR' ):
+                elif ( device.ptype == 'MMC' ):
                     mmc_base     = device.base
                     mmc_size     = device.size
@@ -535,11 +546,54 @@
                     nb_mmc +=1
 
-                elif ( device.ptype == 'DMA_SCL' ):
-                    dma_base     = device.base
-                    dma_size     = device.size
-                    dma_channels = device.channels
-                    nb_dma +=1
-
-                elif ( device.ptype == 'NIC_CBF' ):
+                elif ( device.ptype == 'MWR_GCD' ):
+                    mwr_base     = device.base
+                    mwr_size     = device.size
+                    mwr_channels = device.channels
+                    mwr_arg0     = device.arg0
+                    mwr_arg1     = device.arg1
+                    mwr_arg2     = device.arg2
+                    mwr_arg3     = device.arg3
+                    use_mwr_gcd  = True
+                    nb_mwr +=1
+                elif ( device.ptype == 'MWR_DCT' ):
+                    mwr_base     = device.base
+                    mwr_size     = device.size
+                    mwr_channels = device.channels
+                    mwr_arg0     = device.arg0
+                    mwr_arg1     = device.arg1
+                    mwr_arg2     = device.arg2
+                    mwr_arg3     = device.arg3
+                    use_mwr_dct  = True
+                    nb_mwr +=1
+                elif ( device.ptype == 'MWR_CPY' ):
+                    mwr_base     = device.base
+                    mwr_size     = device.size
+                    mwr_channels = device.channels
+                    mwr_arg0     = device.arg0
+                    mwr_arg1     = device.arg1
+                    mwr_arg2     = device.arg2
+                    mwr_arg3     = device.arg3
+                    use_mwr_cpy  = True
+                    nb_mwr +=1
+
+                elif ( device.ptype == 'ROM' ):
+                    rom_base     = device.base
+                    rom_size     = device.size
+                    rom_channels = device.channels
+                    nb_rom +=1
+
+                elif ( device.ptype == 'DROM' ):
+                    drom_base     = device.base 
+                    drom_size     = device.size
+                    drom_channels = device.channels
+                    nb_drom +=1
+
+                elif ( device.ptype == 'SIM' ):
+                    sim_base     = device.base
+                    sim_size     = device.size
+                    sim_channels = device.channels
+                    nb_sim +=1
+
+                elif ( device.ptype == 'NIC' ):
                     nic_base     = device.base
                     nic_size     = device.size
@@ -547,5 +601,11 @@
                     nb_nic +=1
 
-                elif ( device.ptype == 'TIM_SCL' ):
+                elif ( device.ptype == 'PIC' ):
+                    pic_base     = device.base
+                    pic_size     = device.size
+                    pic_channels = device.channels
+                    nb_pic +=1
+
+                elif ( device.ptype == 'TIM' ):
                     tim_base     = device.pseg.base
                     tim_size     = device.pseg.size
@@ -553,38 +613,27 @@
                     nb_tim +=1
 
-                elif ( device.ptype == 'TXT_TTY' ):
-                    txt_base     = device.base
-                    txt_size     = device.size
-                    txt_channels = device.channels
-                    use_txt_tty  = True
-                    nb_txt +=1
-                elif ( device.ptype == 'TXT_RS2' ):
-                    txt_base     = device.base
-                    txt_size     = device.size
-                    txt_channels = device.channels
-                    use_txt_rs2  = True
-                    nb_txt +=1
-                elif ( device.ptype == 'TXT_MTY' ):
-                    txt_base     = device.base
-                    txt_size     = device.size
-                    txt_channels = device.channels
-                    use_txt_mty  = True
-                    nb_txt +=1
-
-                elif ( device.ptype == 'ICU_XCU' ):
-                    icu_base     = device.base
-                    icu_size     = device.size
-                    icu_channels = device.channels
-                    icu_arg0     = device.arg0
-                    icu_arg1     = device.arg1
-                    icu_arg2     = device.arg2
-                    icu_arg3     = device.arg3
-                    nb_icu +=1
-
-                elif ( device.ptype == 'PIC_TSR' ):
-                    pic_base     = device.base
-                    pic_size     = device.size
-                    pic_channels = device.channels
-                    nb_pic +=1
+                elif ( device.ptype == 'TTY' ):
+                    tty_base     = device.base
+                    tty_size     = device.size
+                    tty_channels = device.channels
+                    nb_tty +=1
+
+                elif ( device.ptype == 'XCU' ):
+                    xcu_base     = device.base
+                    xcu_size     = device.size
+                    xcu_channels = device.channels
+                    xcu_arg0     = device.arg0
+                    xcu_arg1     = device.arg1
+                    xcu_arg2     = device.arg2
+                    nb_xcu +=1
+
+        # no more than two access to external devices
+        assert ( nb_fbf <= 2 )
+        assert ( nb_cma <= 2 )
+        assert ( nb_ioc <= 2 )
+        assert ( nb_nic <= 2 )
+        assert ( nb_tim <= 2 )
+        assert ( nb_tty <= 2 )
+        assert ( nb_pic <= 2 )
 
         # one and only one IOC controller
@@ -598,4 +647,11 @@
             rdk_base = 0
             rdk_size = 0
+
+        # only one type of MWR controller
+        nb_mwr_types = 0
+        if use_mwr_gcd:       nb_mwr_types += 1
+        if use_mwr_dct:       nb_mwr_types += 1
+        if use_mwr_cpy:       nb_mwr_types += 1
+        if ( nb_mwr > 0 ) : assert ( nb_mwr_types == 1 )
 
         # Compute total number of cores, devices and irqs
@@ -637,20 +693,22 @@
         s += '#define BOOT_CORE_CXY          %d\n'    % self.boot_cxy
         s += '#define CACHE_LINE_SIZE        %d\n'    % self.cache_line
-        s += '#define SYS_CLK                %d\n'    % self.sys_clk
         s += '\n'
 
         s += '/* Peripherals */\n'
         s += '\n'
-        s += '#define NB_TXT_CHANNELS        %d\n'    % txt_channels
+        s += '#define NB_TTY_CHANNELS        %d\n'    % tty_channels
         s += '#define NB_IOC_CHANNELS        %d\n'    % ioc_channels
         s += '#define NB_NIC_CHANNELS        %d\n'    % nic_channels
+        s += '#define NB_CMA_CHANNELS        %d\n'    % cma_channels
         s += '#define NB_TIM_CHANNELS        %d\n'    % tim_channels
-        s += '\n'
-        s += '#define USE_ICU                %d\n'    % ( nb_icu != 0 )
+        s += '#define NB_DMA_CHANNELS        %d\n'    % dma_channels
+        s += '\n'
+        s += '#define USE_XCU                %d\n'    % ( nb_xcu != 0 )
+        s += '#define USE_DMA                %d\n'    % ( nb_dma != 0 )
+        s += '\n'
         s += '#define USE_IOB                %d\n'    % ( nb_iob != 0 )
         s += '#define USE_PIC                %d\n'    % ( nb_pic != 0 )
         s += '#define USE_FBF                %d\n'    % ( nb_fbf != 0 )
         s += '#define USE_NIC                %d\n'    % ( nb_nic != 0 )
-        s += '#define USE_DMA                %d\n'    % ( nb_dma != 0 )
         s += '\n'
         s += '#define USE_IOC_BDV            %d\n'    % use_ioc_bdv
@@ -660,18 +718,20 @@
         s += '#define USE_IOC_RDK            %d\n'    % use_ioc_rdk
         s += '\n'
-        s += '#define USE_TXT_TTY            %d\n'    % use_txt_tty
-        s += '#define USE_TXT_RS2            %d\n'    % use_txt_rs2
-        s += '#define USE_TXT_MTY            %d\n'    % use_txt_mty
-        s += '\n'
-        s += '#define USE_FBF_SCL            %d\n'    % use_fbf_scl
-        s += '#define USE_FBF_LTI            %d\n'    % use_fbf_lti
+        s += '#define USE_MWR_GCD            %d\n'    % use_mwr_gcd
+        s += '#define USE_MWR_DCT            %d\n'    % use_mwr_dct
+        s += '#define USE_MWR_CPY            %d\n'    % use_mwr_cpy
         s += '\n'
         s += '#define FBUF_X_SIZE            %d\n'    % fbf_arg0
         s += '#define FBUF_Y_SIZE            %d\n'    % fbf_arg1
         s += '\n'
-        s += '#define ICU_NB_HWI             %d\n'    % icu_arg0
-        s += '#define ICU_NB_PTI             %d\n'    % icu_arg1
-        s += '#define ICU_NB_WTI             %d\n'    % icu_arg2
-        s += '#define ICU_NB_OUT             %d\n'    % icu_arg3
+        s += '#define XCU_NB_HWI             %d\n'    % xcu_arg0
+        s += '#define XCU_NB_PTI             %d\n'    % xcu_arg1
+        s += '#define XCU_NB_WTI             %d\n'    % xcu_arg2
+        s += '#define XCU_NB_OUT             %d\n'    % xcu_channels
+        s += '\n'
+        s += '#define MWR_TO_COPROC          %d\n'    % mwr_arg0
+        s += '#define MWR_FROM_COPROC        %d\n'    % mwr_arg1
+        s += '#define MWR_CONFIG             %d\n'    % mwr_arg2
+        s += '#define MWR_STATUS             %d\n'    % mwr_arg3
         s += '\n'
 
@@ -681,4 +741,10 @@
         s += '#define SEG_RAM_SIZE           0x%x\n'  % ram_size
         s += '\n'
+        s += '#define SEG_CMA_BASE           0x%x\n'  % (cma_base & local_physical_mask)
+        s += '#define SEG_CMA_SIZE           0x%x\n'  % cma_size
+        s += '\n'
+        s += '#define SEG_DMA_BASE           0x%x\n'  % (dma_base & local_physical_mask)
+        s += '#define SEG_DMA_SIZE           0x%x\n'  % dma_size
+        s += '\n'
         s += '#define SEG_FBF_BASE           0x%x\n'  % (fbf_base & local_physical_mask)
         s += '#define SEG_FBF_SIZE           0x%x\n'  % fbf_size
@@ -693,6 +759,6 @@
         s += '#define SEG_MMC_SIZE           0x%x\n'  % mmc_size
         s += '\n'
-        s += '#define SEG_DMA_BASE           0x%x\n'  % (dma_base & local_physical_mask)
-        s += '#define SEG_DMA_SIZE           0x%x\n'  % dma_size
+        s += '#define SEG_MWR_BASE           0x%x\n'  % (mwr_base & local_physical_mask)
+        s += '#define SEG_MWR_SIZE           0x%x\n'  % mwr_size
         s += '\n'
         s += '#define SEG_ROM_BASE           0x%x\n'  % (rom_base & local_physical_mask)
@@ -711,12 +777,15 @@
         s += '#define SEG_TIM_SIZE           0x%x\n'  % tim_size
         s += '\n'
-        s += '#define SEG_TXT_BASE           0x%x\n'  % (txt_base & local_physical_mask)
-        s += '#define SEG_TXT_SIZE           0x%x\n'  % txt_size
-        s += '\n'
-        s += '#define SEG_ICU_BASE           0x%x\n'  % (icu_base & local_physical_mask)
-        s += '#define SEG_ICU_SIZE           0x%x\n'  % icu_size
+        s += '#define SEG_TTY_BASE           0x%x\n'  % (tty_base & local_physical_mask)
+        s += '#define SEG_TTY_SIZE           0x%x\n'  % tty_size
+        s += '\n'
+        s += '#define SEG_XCU_BASE           0x%x\n'  % (xcu_base & local_physical_mask)
+        s += '#define SEG_XCU_SIZE           0x%x\n'  % xcu_size
         s += '\n'
         s += '#define SEG_RDK_BASE           0x%x\n'  % (rdk_base & local_physical_mask)
         s += '#define SEG_RDK_SIZE           0x%x\n'  % rdk_size
+        s += '\n'
+        s += '#define SEG_DROM_BASE          0x%x\n'  % (drom_base & local_physical_mask)
+        s += '#define SEG_DROM_SIZE          0x%x\n'  % drom_size
         s += '\n'
         s += '#endif\n'
@@ -862,5 +931,5 @@
         self.arg2     = arg2          # optional (semantic depends on ptype)
         self.arg3     = arg3          # optional (semantic depends on ptype)
-        self.irqs     = []            # set of input IRQs (for PIC and ICU only)
+        self.irqs     = []            # set of input IRQs (for PIC and XCU only)
         self.irq_ctrl = None          # interrupt controller for this device
         return
@@ -877,5 +946,5 @@
         s += ' arg2="%d"'                    % self.arg2
         s += ' arg3="%d"'                    % self.arg3
-        if ( (self.ptype == 'PIC_TSR') or (self.ptype == 'ICU_XCU') ):
+        if ( (self.ptype == 'PIC') or (self.ptype == 'XCU') ):
             s += ' >\n'
             for irq in self.irqs: s += irq.xml()
@@ -889,6 +958,6 @@
 
         if ( verbose ):
-            print '*** cbin for device[%d] / type = %s / base = %x' \
-                  % (self.index , self.ptype , self.base)
+            print '*** cbin for device[%d] / type %s' \
+                  % (self.index , self.ptype)
 
         # check index
@@ -916,7 +985,7 @@
 
         byte_stream = bytearray()
+        byte_stream += mapping.int2bytes(4,ptype_id)       # device type
         byte_stream += mapping.int2bytes(8,self.base)      # segment base address
         byte_stream += mapping.int2bytes(8,self.size)      # segment size
-        byte_stream += mapping.int2bytes(4,ptype_id)       # device type
         byte_stream += mapping.int2bytes(4,self.channels)  # number of channels
         byte_stream += mapping.int2bytes(4,self.arg0)      # optionnal arg0
@@ -928,4 +997,5 @@
 
         if ( verbose ):
+            print 'ptype      = %d' %  ptype_id
             print 'base       = %x' %  self.base
             print 'size       = %x' %  self.size
@@ -964,6 +1034,6 @@
 
         if ( verbose ):
-            print '*** cbin for irq[%d] / src_dev = %s' \
-                   % (self.port , self.dev.ptype)
+            print '*** cbin for irq[%d] / type = %s' \
+                   % (self.index , self.isrtype)
 
         # check index
@@ -971,5 +1041,7 @@
             print '[genarch error] in Irq.cbin()'
             print '    irq global index = %d / expected = %d' \
-                       % (self.index , expected)
+                       % (self.index,expected)
+            sys.exit(1)
+
         # compute source device type numerical value
         dev_id = 0xFFFFFFFF
