Changeset 137 for trunk/hal/x86_64/core/hal_init.c

Timestamp:

Jul 4, 2017, 10:17:44 AM (7 years ago)

Author:

max@…

Message:

improve the APIC implementation

File:

• trunk/hal/x86_64/core/hal_init.c (modified) (3 diffs)

trunk/hal/x86_64/core/hal_init.c

@@ -84 +84 @@
 static void init_bootinfo_icu(boot_device_t *dev)
 {
+        extern uint32_t hwi_baseidx;
+        extern uint32_t wti_baseidx;
+        extern uint32_t pti_baseidx;
+        extern size_t ioapic_pins;
+
         memset(dev, 0, sizeof(boot_device_t));
 
-        dev->base = NULL; /* XXX */
+        dev->base = 0;
         dev->type = (DEV_FUNC_ICU << 16) | IMPL_ICU_XCU;
         dev->channels = 1;
-        dev->param0 = 0;
-        dev->param1 = 0;
-        dev->param2 = 0;
+
+        /*
+         * Give 20% of the pins to HWI, 80% to WTI.
+         */
+        dev->param0 = (ioapic_pins * 20) / 100;  /* hwi_nr */
+        dev->param1 = ioapic_pins - dev->param0; /* wti_nr */
+
+        /*
+         * We always set 1 for pti_nr. On x86, timer interrupts are handled by
+         * LAPIC, which is per-cpu and not global. Therefore, we always have one
+         * timer for each CPU, and its IRQ number is faked to 0.
+         */
+        dev->param2 = 1; /* pti_nr */
+
         dev->param3 = 0;
+
+        /* Set the base idx for the XCU driver */
+        hwi_baseidx = 0;
+        wti_baseidx = dev->param0;
+        pti_baseidx = 0xFFFFFFFF;
 
 #ifdef NOTYET
@@ -132 +153 @@
         size_t i, rsvd_nr;
 
-        memset(rsvd, 0, sizeof(boot_rsvd_t));
+        memset(rsvd, 0, sizeof(boot_rsvd_t) * CONFIG_PPM_MAX_RSVD);
 
         i = 0, rsvd_nr = 0;
@@ -208 +229 @@
         init_bootinfo_core(&info->core[0]);
 
-        info->rsvd_nr = init_bootinfo_rsvd(&info->rsvd);
+        info->rsvd_nr = init_bootinfo_rsvd((boot_rsvd_t *)&info->rsvd);
 
         init_bootinfo_icu(&info->dev_icu);