Changeset 166 for trunk/hal/x86_64/core/hal_init.c

Timestamp:

Jul 10, 2017, 10:14:27 AM (7 years ago)

Author:

max@…

Message:

identify the cpu features

File:

• trunk/hal/x86_64/core/hal_init.c (modified) (6 diffs)

trunk/hal/x86_64/core/hal_init.c

@@ -27 +27 @@
 #include <hal_apic.h>
 #include <hal_internal.h>
+#include <hal_register.h>
+
 #include <hal_remote.h>
 #include <hal_irqmask.h>
@@ -46 +48 @@
 static void gdt_create();
 static void idt_create();
+void cpu_identify();
 void cpu_attach();
 
@@ -250 +253 @@
 }
 
+/* -------------------------------------------------------------------------- */
+
 void init_x86_64(paddr_t firstpa)
 {
@@ -262 +267 @@
         gdt_create();
         idt_create();
+
+        /* Identify the features of the cpu */
+        cpu_identify();
 
         /* Attach cpu0 */
@@ -477 +485 @@
 /* -------------------------------------------------------------------------- */
 
+uint64_t cpu_features[4] __in_kdata;
+
+void cpu_identify()
+{
+        /*
+         * desc[0] = eax
+         * desc[1] = ebx
+         * desc[2] = ecx
+         * desc[3] = edx
+         */
+        uint32_t desc[4];
+        char vendor[13];
+        size_t lvl;
+
+        /*
+         * Get information from the standard cpuid leafs
+         */
+        cpuid(0, 0, (uint32_t *)&desc);
+
+        lvl = (uint64_t)desc[0];
+        x86_printf("-> cpuid standard level: %z\n", lvl);
+
+        memcpy(vendor + 0, &desc[1], sizeof(uint32_t));
+        memcpy(vendor + 8, &desc[2], sizeof(uint32_t));
+        memcpy(vendor + 4, &desc[3], sizeof(uint32_t));
+        vendor[12] = '\0';
+        x86_printf("-> CPU vendor: '%s'\n", vendor);
+
+        if (lvl >= 1) {
+                cpuid(1, 0, (uint32_t *)&desc);
+                cpu_features[0] = desc[3];
+                cpu_features[1] = desc[2];
+        }
+
+        /*
+         * Get information from the extended cpuid leafs
+         */
+        cpuid(0x80000000, 0, desc);
+
+        lvl = (uint64_t)desc[0];
+        x86_printf("-> cpuid extended level: %Z\n", lvl);
+}
+
+/* -------------------------------------------------------------------------- */
+
 void cpu_attach(size_t lid)
 {
@@ -482 +535 @@
         cpu_load_idt();
         cpu_create_tss(lid);
-}
-
+
+        if (cpu_features[0] & CPUID_PSE) {
+                lcr4(rcr4() | CR4_PSE);
+                tlbflushg();
+        } else {
+                /*
+                 * amd64 supports PSE by default, if it's not here we have a
+                 * problem
+                 */
+                x86_panic("PSE not supported");
+        }
+}
+