Changeset 236 for trunk/hal


Ignore:
Timestamp:
Jul 19, 2017, 2:30:15 PM (4 years ago)
Author:
max@…
Message:

Launch the secondary CPUs. For now, they all say hello and enter
an infinite loop.

Location:
trunk/hal/x86_64/core
Files:
1 added
6 edited

Legend:

Unmodified
Added
Removed
  • trunk/hal/x86_64/core/hal_apic.c

    r235 r236  
    491491
    492492int
    493 start_secondary_cpu(uint32_t gid, paddr_t pa)
     493boot_cpuN(uint32_t gid, paddr_t pa)
    494494{
    495495        /*
  • trunk/hal/x86_64/core/hal_apic.h

    r234 r236  
    3434uint32_t hal_lapic_gid();
    3535void hal_apic_init();
     36
     37int boot_cpuN(uint32_t gid, paddr_t pa);
     38
    3639#endif
    3740
  • trunk/hal/x86_64/core/hal_boot.h

    r234 r236  
    3737#define ASM_ENTRY(x) \
    3838        .text; ASM_ALIGN_TEXT; .globl x; .type x,@function; x:
     39
     40#define LABEL(x) \
     41        .globl x; .type x,@function; x:
    3942
    4043/* -------------------------------------------------------------------------- */
     
    131134/* -------------------------------------------------------------------------- */
    132135
     136#define SMP_TRAMPOLINE_PA       (2 * PAGE_SIZE)
     137
     138/* -------------------------------------------------------------------------- */
     139
    133140#define KERNEL_VA_SIZE          (NKL2_KIMG_ENTRIES * NBPD_L2)
    134141#define CLUSTERS_BASE_VA        HAL_VA_BASE
  • trunk/hal/x86_64/core/hal_cpu.S

    r235 r236  
    108108        ret
    109109
     110ASM_ENTRY(rcr0)
     111        movq    %cr0,%rax
     112        ret
     113
    110114ASM_ENTRY(rcr2)
    111115        movq    %cr2,%rax
     116        ret
     117
     118ASM_ENTRY(rcr3)
     119        movq    %cr3,%rax
    112120        ret
    113121
  • trunk/hal/x86_64/core/hal_init.c

    r235 r236  
    5858uint8_t mb_mmap[PAGE_SIZE] __in_kdata;
    5959
     60/* x86-specific per-cluster structures */
     61uint8_t gdtstore[PAGE_SIZE] __in_kdata;
     62uint8_t idtstore[PAGE_SIZE] __in_kdata;
     63
     64/* x86-specific per-cpu structures */
     65typedef struct {
     66        bool_t valid;
     67        struct tss tss;
     68        struct tls tls;
     69        uint8_t boot_stack[STKSIZE];
     70        uint8_t intr_stack[STKSIZE];
     71        uint8_t dbfl_stack[STKSIZE];
     72        uint8_t nmfl_stack[STKSIZE];
     73} percpu_archdata_t;
     74percpu_archdata_t cpudata[CONFIG_MAX_LOCAL_CORES] __in_kdata;
     75
    6076/* -------------------------------------------------------------------------- */
    6177
     
    245261/* -------------------------------------------------------------------------- */
    246262
     263static uint32_t cpuN_booted __in_kdata;
     264
     265void start_secondary_cpus()
     266{
     267        pt_entry_t flags = PG_V | PG_KW;
     268        extern vaddr_t cpuN_boot_trampoline;
     269        extern vaddr_t cpuN_boot_trampoline_end;
     270        extern paddr_t smp_L4pa;
     271        extern vaddr_t smp_stkva;
     272        extern paddr_t L4paddr;
     273        size_t i, sz;
     274
     275        smp_L4pa = L4paddr;
     276
     277        /* map the SMP trampoline (identity) */
     278        vaddr_t trampva = (vaddr_t)SMP_TRAMPOLINE_PA;
     279        hal_gpt_maptree_area(trampva, trampva + PAGE_SIZE);
     280        hal_gpt_enter(trampva, SMP_TRAMPOLINE_PA, flags);
     281
     282        /* copy it */
     283        sz = (size_t)&cpuN_boot_trampoline_end - (size_t)&cpuN_boot_trampoline;
     284        memcpy((void *)trampva, (void *)&cpuN_boot_trampoline, sz);
     285
     286        for (i = 0; i < CONFIG_MAX_LOCAL_CORES; i++) {
     287                if (i == 0 || !cpudata[i].valid) {
     288                        continue;
     289                }
     290
     291                smp_stkva = (vaddr_t)cpudata[i].boot_stack + STKSIZE;
     292
     293                cpuN_booted = 0;
     294                boot_cpuN(i, SMP_TRAMPOLINE_PA);
     295                while (!hal_atomic_cas(&cpuN_booted, 1, 0)) {
     296                        /* wait */
     297                }
     298        }
     299
     300        // XXX: unmap the trampoline
     301}
     302
     303void init_x86_64_cpuN()
     304{
     305        cpuN_booted = 1;
     306        x86_printf("-> cpu%z is alive!\n", hal_lapic_gid());
     307        while (1);
     308}
     309
     310/* -------------------------------------------------------------------------- */
     311
    247312static void apic_map()
    248313{
     
    310375        init_bootinfo(&btinfo);
    311376
     377        start_secondary_cpus();
     378
    312379        reg_t dummy;
    313380        hal_enable_irq(&dummy);
     
    342409
    343410/* -------------------------------------------------------------------------- */
    344 
    345 /* x86-specific per-cluster structures */
    346 uint8_t gdtstore[PAGE_SIZE] __in_kdata;
    347 uint8_t idtstore[PAGE_SIZE] __in_kdata;
    348 
    349 /* x86-specific per-cpu structures */
    350 typedef struct {
    351         bool_t valid;
    352         struct tss tss;
    353         struct tls tls;
    354         uint8_t intr_stack[STKSIZE];
    355         uint8_t dbfl_stack[STKSIZE];
    356         uint8_t nmfl_stack[STKSIZE];
    357 } percpu_archdata_t;
    358 percpu_archdata_t cpudata[CONFIG_MAX_LOCAL_CORES] __in_kdata;
    359411
    360412void cpu_activate(uint32_t gid)
  • trunk/hal/x86_64/core/hal_internal.h

    r235 r236  
    4848void wrmsr(uint32_t, uint64_t);
    4949void mfence();
    50 vaddr_t rcr2(void);
     50uint64_t rcr0(void);
     51vaddr_t rcr2(void);
     52uint64_t rcr3(void);
    5153uint64_t rcr4(void);
    5254void lcr4(uint64_t);
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