Index: trunk/hal/tsar_mips32/core/hal_kentry.S
===================================================================
--- trunk/hal/tsar_mips32/core/hal_kentry.S	(revision 121)
+++ trunk/hal/tsar_mips32/core/hal_kentry.S	(revision 279)
@@ -1,4 +1,4 @@
 /*
- * hal_kentry.S - exception/interrupt/syscall kernel entry point for MIPS32
+ * hal_kentry.S - Interrupt / Exception / Syscall kernel entry point for MIPS32
  * 
  * AUthors   Ghassan Almaless (2007,2008,2009,2010,2011,2012)
@@ -30,29 +30,28 @@
 # or syscall for the TSAR_MIPS32 architecture.  
 #
-# - If the core is in user mode:
-#   . we desactivate the MMU.
-#   . we save the context in the uzone of the calling thread descriptor.
-#   . we increment the cores_in_kernel variable.
-#   . we call the relevant exception/interrupt/syscall handler
+# When we enter the kernel, we test the ststus register:
+# - If the core is in user mode, we desactivate the MMU, and we save
+#   the core context in the uzone of the calling thread descriptor.
+# - If the core is already in kernel mode (in case of interrupt), 
+#   we save the context in the kernel stack.
+# - In both cases, we increment the cores_in_kernel variable,
+#   and we call the relevant exception/interrupt/syscall handler
 #
-# - If the core is already in kernel mode: 
-#   . we save the context in the kernel stack
-#   . we call the relevant exception/interrupt/syscall handler
-#
-# - In both cases, when the handler returns:
-#   . we restore the context
-#   . we reactivate the MMU ??? TODO
+# When we exit the kernel after handler execution:
+# - we restore the core context from the uzone
 #---------------------------------------------------------------------------------
 
-	.section   .kentry,"ax",@progbits
-	.extern    cpu_do_interrupt
-	.extern    cpu_do_exception
-	.extern    cpu_do_syscall
-	.extern    cpu_kentry
-	.extern    cpu_kexit
+	.section   .kgiet, "ax", @progbits
+
+	.extern    hal_do_interrupt
+	.extern    hal_do_exception
+	.extern    hal_do_syscall
+	.extern    cluster_core_kernel_enter
+	.extern    cluster_core_kernel_exit
+
 	.org       0x180
-	.ent       kentry
-	.global    kentry
-	.global    kentry_load
+	.ent       kernel_enter
+	.global    kernel_enter
+
 	.set       noat
 	.set       noreorder
@@ -67,8 +66,8 @@
 
 #---------------------------------------------------------------------------------
-# Kernel Entry point
+# Kernel Entry point for Interrupt / Exception / Syscall
 #---------------------------------------------------------------------------------
 
-kentry:
+kernel_enter:
 	mfc0    $26,    $12                 # read SR to test user/kernel mode
 	andi    $26,    $26,  0x10          # User Mode bitmask
@@ -101,5 +100,5 @@
 #---------------------------------------------------------------------------------------	
 # this code is executed when the core is in kernel mode:
-# - we use an uzone allocated in kernel stack.
+# - we use an uzone dynamically allocated in kernel stack.
 # - we set the MMU off, set the MMU data_paddr extension to local_cxy,
 #   and save the CP2_MODE and CP2_DEXT to uzone.
@@ -141,6 +140,7 @@
 
 #--------------------------------------------------------------------------------------	
-# this code is executed in both modes, with the two following assumptions:
-# - $27 contains the pointer on uzone to save the cpu registers
+# This code is executed in both modes, and saves the core context,
+# with the two following assumptions:
+# - $27 contains the pointer on uzone to save the core registers
 # - $29 contains the kernel stack pointer
 
@@ -186,21 +186,28 @@
 	sw      $17,	(UZ_CR*4)($27)		# Save CR
 
-	srl	    $3,     $18,  5	            # put SR in kernel mode, IRQ disabled, clear exl
+    # put SR in kernel mode, IRQ disabled, clear exl
+	srl	    $3,     $18,  5
 	sll     $3,	    $3,   5	
 	mtc0	$3,	    $12			        # Set new SR
 
-	andi    $1,     $17,  0x3F          # $1 <= XCODE (from CR)
-
 	# signal that core enters kernel
-	jal	    cluster_core_kernel_enter
+	la      $1,     cluster_core_kernel_enter
+	jal	    $1
     nop
 
 #---------------------------------------------------------------------------------------
-# Depending on XCODE (in $1) , call the apropriate handler. The three called
-# functions take the same two arguments: thread pointer and uzone pointer.
+# This code call the relevant Interrupt / Exception / Syscall handler,
+# depending on XCODE in CP0_CR, with the two following assumptions:
+# - $27 contains the pointer on uzone containing to save the core registers
+# - $29 contains the kernel stack pointer
+# The three handlers take the same two arguments: thread pointer and uzone pointer.
+# The uzone pointer is saved in $19 to be used by kernel_exit.
+
+	mfc0    $17,    $13                 # $1 <= CR
+	andi    $1,     $1,   0x3F          # $1 <= XCODE
 
 	mfc0    $4,     $4,   2             # $4 <= thread pointer (first arg)
 	or	    $5,	    $0,   $27		    # $5 <= uzone pointer (second arg)
-	or	    $19,    $0,	  $27	        # $19 <= &uzone (for kentry_exit)
+	or	    $19,    $0,	  $27	        # $19 <= &uzone (for kernel_exit)
 
 	ori	    $8,     $0,   0x20          # $8 <= cause syscall
@@ -215,5 +222,5 @@
 	addiu	$29,	$29,  -8	        # hal_do_exception has 2 args
 	addiu	$29,	$29,  8
-	j       kentry_exit                 # jump to kentry_exit
+	j       kernel_exit                 # jump to kernel_exit
     nop
 
@@ -223,6 +230,6 @@
 	addiu	$29,	$29,  -8            # hal_do_syscall has 2 args
 	addiu	$29,	$29,  8
-	j	    kentry_exit                 # jump to kentry_exit
-	or	    $19,	$0,   $2
+	j	    kernel_exit                 # jump to kernel_exit
+	nop 
 	
 cause_int:
@@ -233,10 +240,13 @@
 
 # -----------------------------------------------------------------------------------
-# Kentry exit
+# Kernel exit
+# The pointer on uzone is supposed to be stored in $19
 # -----------------------------------------------------------------------------------
-kentry_exit:
+kernel_exit:
 
 	# signal that core exit kernel
-    jal     cluster_core_kernel_exit
+    la      $1,     cluster_core_kernel_exit
+    jalr    $1
+    nop
 
 	# restore context from uzone
@@ -286,57 +296,17 @@
 	lw	    $31,	(UZ_RA*4)($27)
 
-
 	lw	    $26,    (UZ_DEXT*4)($27)
 	mtc2	$26,    $24			        # restore CP2_DEXT from uzone
 
-    #TODO: optimize
-	lw	    $26,    (UZ_MODE*4)($27)    # get saved CP2_MODE from uzone
-	andi	$26,	$26,	0xc         # keep only the TLBs controling bits
-	beq     $26,    $0,	    out_mmu_3   # both MSB are 0 (the first two LSB are always set)
-	andi	$26,	$26,	0x8
-	beq     $26,    $0,	    out_mmu_7   # first MSB is 0 (bit 2 is set)
-
-# Possible value for MMU_MODE
-# In kernel mode : 0x7/0x3
-# In user mode   : 0xF
-
-# DP_EXT can either be local or remote
-# Once these register set we can no longuer 
-# access global data
-
-out_mmu_F:
-	ori	    $26,	$0,	   0xF
-	mtc2    $26,    $1			        # CP2_MODE <= 0xF
-	j	    out_kentry
-	nop
-
-out_mmu_7:
-	ori	    $26,    $0,    0x7	
-	mtc2    $26,    $1			        # CP2_MODE <= 0x7
-	j	out_kentry
-	nop
-
-out_mmu_3:
-	ori     $26,    $0,	   0x3
-	mtc2    $26,    $1			        # CP2_MODE <= 0x3
-
-out_kentry:
+	lw	    $26,    (UZ_MODE*4)($27)    
+    mtc2    $26,    $1                  # restore CP2_MODE from uzone
+
 	nop
     eret
 
-    .end kentry
+    .end kernel_enter
     .set reorder
     .set at
 
-	.ent kentry_load
-kentry_load:
-	# theses nops are required to load the eret instruction
-	# while we are in virtual mode (processor pipeline) ?
-	mtc2     $26,    $1	       # set MMU MODE
-	nop			
-	nop
-    eret
-    .end kentry_load
-
 #-------------------------------------------------------------------------------
 
