Changeset 406 for trunk/hal/tsar_mips32/drivers/soclib_pic.c

Timestamp:

Aug 29, 2017, 12:03:37 PM (7 years ago)

Author:

alain

Message:

This version executed successfully the user "init" process on a mono-processor TSAR architecture.

File:

• trunk/hal/tsar_mips32/drivers/soclib_pic.c (modified) (6 diffs)

trunk/hal/tsar_mips32/drivers/soclib_pic.c

@@ -116 +116 @@
     chdev_t  * src_chdev;    // pointer on source chdev descriptor
     uint32_t   index;        // WTI / HWI / PTI index
-    uint32_t   ack;          // XCU acknowledge requires a read...
-
-    core_t * core = CURRENT_THREAD->core;
+
+    uint32_t * xcu_base = soclib_pic_xcu_base();
+
+    core_t   * core = CURRENT_THREAD->core;
 
     // get XCU status
@@ -126 +127 @@
                            &pti_status );
 
-    irq_dmsg("\n[INFO] %s : enter for core[%x,%d] / WTI = %x / HWI = %x / WTI = %x\n",
+    irq_dmsg("\n[DMSG] %s : enter for core[%x,%d] / WTI = %x / HWI = %x / WTI = %x\n",
              __FUNCTION__ , local_cxy , core->lid , wti_status , hwi_status , pti_status );
 
@@ -139 +140 @@
             assert( (index == core->lid) , __FUNCTION__ , "illegal IPI index" );
 
-            // read mailbox content to acknowledge WTI,
-            uint32_t * base = soclib_pic_xcu_base();
-            ack = base[(XCU_WTI_REG << 5) | core->lid];
+            irq_dmsg("\n[DMSG] %s : core[%x,%d] received an IPI / cycle %d\n",
+             __FUNCTION__ , local_cxy , core->lid , hal_time_stamp() );
+
+            // acknowledge WTI (this require an XCU read)
+            uint32_t   ack  = xcu_base[(XCU_WTI_REG << 5) | core->lid];
             
             // check RPC FIFO,  and activate or create a RPC thread
@@ -165 +168 @@
             else                                 // call relevant ISR
             {
-                        irq_dmsg("\n[INFO] %s received WTI : index = %d for core %d in cluster %d\n",
-                         __FUNCTION__ , index , core->lid , local_cxy );
+                irq_dmsg("\n[DMSG] %s : core[%x,%d] received external WTI %d / cycle %d\n",
+                __FUNCTION__ , local_cxy , core->lid , index , hal_time_stamp() );
 
                 // call ISR
@@ -189 +192 @@
 
             // disable HWI in local XCU controller
-            uint32_t * base = soclib_pic_xcu_base();
-            base[(XCU_MSK_HWI_DISABLE << 5) | core->lid] = 1 << core->lid;
+            xcu_base[(XCU_MSK_HWI_DISABLE << 5) | core->lid] = 1 << core->lid;
                 }
         else                    // call relevant ISR
         {
-                    irq_dmsg("\n[INFO] %s received HWI : index = %d for core %d in cluster %d\n",
-                     __FUNCTION__ , index , core->lid , local_cxy );
+            irq_dmsg("\n[DMSG] %s : core[%x,%d] received HWI %d / cycle %d\n",
+            __FUNCTION__ , local_cxy , core->lid , index , hal_time_stamp() );
 
             // call ISR
@@ -206 +208 @@
         index = pti_status - 1;
 
-                irq_dmsg("\n[INFO] %s received PTI : index = %d for cpu %d in cluster %d\n",
-                 __FUNCTION__ , index , core->lid , local_cxy );
+        irq_dmsg("\n[DMSG] %s : core[%x,%d] received PTI %d / cycle %d\n",
+        __FUNCTION__ , core->lid , local_cxy , index , hal_time_stamp() );
 
         assert( (index == core->lid) , __FUNCTION__ , "unconsistent PTI index\n");
 
-        // acknowledge PTI
-        uint32_t * base = soclib_pic_xcu_base();
-        ack = base[(XCU_PTI_ACK << 5) | core->lid];
+        // acknowledge PTI (this require a read access to XCU)
+        uint32_t   ack  = xcu_base[(XCU_PTI_ACK << 5) | core->lid];
 
         // execute all actions related to TICK event
-        core_clock( core );
+        // condition is always true, but we must use the ack value
+        if( ack + 1 ) core_clock( core );
         }
 }  // end soclib_pic_irq_handler()