Ignore:
Timestamp:
Dec 5, 2017, 4:20:07 PM (4 years ago)
Author:
alain
Message:

Fix several bugs in the fork() syscall.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/hal/tsar_mips32/core/hal_kentry.h

    r407 r408  
    3636
    3737/****************************************************************************************
    38  * This structure defines the cpu_uzone for TSAR MIPS32, as well as the
    39  *  mnemonics used by the hal_kentry assembly code.
     38 * This structure defines the cpu_uzone dynamically allocated in the kernel stack
     39 * by the hal_kentry assembly code for the TSAR_MIPS32 architecture.
     40 * WARNING : It is replicated in hal_kentry.S file.
    4041 ***************************************************************************************/
    4142
     
    5657#define      UZ_T6           14   /* t6_14   */
    5758#define      UZ_T7           15   /* t7_15   */
    58 #define      UZ_T8           16   /* t8_24   */
    59 #define      UZ_T9           17   /* t9_25   */
    60 #define      UZ_S0           18   /* s0_16   */
    61 #define      UZ_S1           19   /* s1_17   */
    62 #define      UZ_S2           20   /* s2_18   */
    63 #define      UZ_S3           21   /* s3_19   */
    64 #define      UZ_S4           22   /* s4_20   */
    65 #define      UZ_S5           23   /* s5_21   */
    66 #define      UZ_S6           24   /* s6_22   */
    67 #define      UZ_S7           25   /* s7_23   */
    68 #define      UZ_S8           26   /* s8_30   */
    69 #define      UZ_GP           27   /* gp_28   */
    70 #define      UZ_RA           28   /* ra_31   */
    71 #define      UZ_EPC          29   /* c0_epc  */
    72 #define      UZ_CR           30   /* c0_cr   */
    73 #define      UZ_SP           31   /* sp_29   */
    74 #define      UZ_SR           32   /* c0_sr   */
    75 #define      UZ_LO           33
    76 #define      UZ_HI           34
     59#define      UZ_S0           16   /* s0_16   */
     60#define      UZ_S1           17   /* s1_17   */
     61#define      UZ_S2           18   /* s2_18   */
     62#define      UZ_S3           19   /* s3_19   */
     63#define      UZ_S4           20   /* s4_20   */
     64#define      UZ_S5           21   /* s5_21   */
     65#define      UZ_S6           22   /* s6_22   */
     66#define      UZ_S7           23   /* s7_23   */
     67#define      UZ_T8           24   /* t8_24   */
     68#define      UZ_T9           25   /* t9_25   */
    7769
    78 #define      UZ_REGS         35
     70#define      UZ_LO           26
     71#define      UZ_HI           27
     72
     73#define      UZ_GP           28   /* gp_28   */
     74#define      UZ_SP           29   /* sp_29   */
     75#define      UZ_S8           30   /* s8_30   */
     76#define      UZ_RA           31   /* ra_31   */
     77
     78#define      UZ_PTPR         32   /* c2_ptpr */
     79#define      UZ_EPC          33   /* c0_epc  */
     80#define      UZ_SR           34   /* c0_sr   */
     81#define      UZ_TH           35   /* c0_th   */
     82#define      UZ_CR           36   /* c0_cr   */
     83
     84#define      UZ_REGS         37
    7985
    8086/*************************************************************************************
    8187 * The hal_kentry_enter() function is the unique kernel entry point in case of
    8288 * exception, interrupt, or syscall for the TSAR_MIPS32 architecture. 
     89 * It can be executed by a core in user mode (in case of exception or syscall),
     90 * or by a core already in kernel mode (in case of interrupt).
    8391 *
    84  * When we enter the kernel, we test the status register:
    85  * - If the core is in user mode, we desactivate the MMU, and we save
    86  *   the core context in the uzone of the calling thread descriptor.
    87  * - If the core is already in kernel mode (in case of interrupt),
    88  *   we save the context in the kernel stack.
    89  * - In both cases, we increment the cores_in_kernel variable,
    90  *   and we call the relevant exception/interrupt/syscall handler
     92 * In both cases it allocates an "uzone" space in the kernel stack to save the
     93 * CPU registers values, desactivates the MMU, and calls the relevant handler
     94 * (exception/interrupt/syscall)
    9195 *
    92  * When we exit the kernel after handler execution:
    93  * - we restore the core context from the uzone and return to user space,
    94  *   calling the hal_kentry_eret()
     96 * After handler execution, it restores the CPU context from the uzone and jumps
     97 * to address contained in EPC calling hal_kentry_eret()
    9598 ************************************************************************************/
    9699void hal_kentry_enter();
     
    98101/*************************************************************************************
    99102 * The hal_kentry_eret() function contains only the assembly "eret" instruction,
    100  * that and the EXL bit in the c0_sr register, and jump to the address
     103 * that reset the EXL bit in the c0_sr register, and jump to the address
    101104 * contained in the c0_epc register.
    102105 * ************************************************************************************/
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