Changeset 443 for trunk/hal


Ignore:
Timestamp:
May 16, 2018, 4:15:22 PM (3 years ago)
Author:
alain
Message:

Fix few bugs whike debugging the sort multi-thread application.

Location:
trunk/hal/tsar_mips32/core
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/hal/tsar_mips32/core/hal_gpt.c

    r440 r443  
    132132    xptr_t     page_xp;
    133133
    134 #if DEBUG_GPT_ACCESS
     134#if DEBUG_HAL_GPT_CREATE
    135135uint32_t cycle = (uint32_t)hal_get_cycles;
    136 if( DEBUG_GPT_ACCESS < cycle )
     136if( DEBUG_HAL_GPT_CREATE < cycle )
    137137printk("\n[DBG] %s : thread %x enter / cycle %d\n",
    138138__FUNCTION__, CURRENT_THREAD, cycle );
     
    161161        gpt->ppn  = ppm_page2ppn( page_xp );
    162162
    163 #if DEBUG_GPT_ACCESS
     163#if DEBUG_HAL_GPT_CREATE
    164164cycle = (uint32_t)hal_get_cycles;
    165 if( DEBUG_GPT_ACCESS < cycle )
     165if( DEBUG_HAL_GPT_CREATE < cycle )
    166166printk("\n[DBG] %s : thread %x exit / cycle %d\n",
    167167__FUNCTION__, CURRENT_THREAD, cycle );
     
    186186        kmem_req_t   req;
    187187    bool_t       is_ref;
     188
     189#if DEBUG_HAL_GPT_DESTROY
     190uint32_t cycle = (uint32_t)hal_get_cycles;
     191if( DEBUG_HAL_GPT_DESTROY < cycle )
     192printk("\n[DBG] %s : thread %x enter / cycle %d\n",
     193__FUNCTION__, CURRENT_THREAD, cycle );
     194#endif
    188195
    189196    // get pointer on calling process
     
    252259    req.ptr  = GET_PTR( ppm_base2page( XPTR(local_cxy , pt1 ) ) );
    253260    kmem_free( &req );
     261
     262#if DEBUG_HAL_GPT_DESTROY
     263cycle = (uint32_t)hal_get_cycles;
     264if( DEBUG_HAL_GPT_DESTROY < cycle )
     265printk("\n[DBG] %s : thread %x exit / cycle %d\n",
     266__FUNCTION__, CURRENT_THREAD, cycle );
     267#endif
    254268
    255269} // end hal_gpt_destroy()
     
    340354    uint32_t            tsar_attr;           // PTE attributes for TSAR MMU
    341355
    342 #if DEBUG_GPT_ACCESS
     356#if DEBUG_HAL_GPT_ACCESS
    343357uint32_t cycle = (uint32_t)hal_get_cycles;
    344 if( DEBUG_GPT_ACCESS < cycle )
     358if( DEBUG_HAL_GPT_ACCESS < cycle )
    345359printk("\n[DBG] %s : thread %x enter / vpn %x / attr %x / ppn %x / cycle %d\n",
    346360__FUNCTION__, CURRENT_THREAD, vpn, attr, ppn, cycle );
     
    357371    tsar_attr = gpt2tsar( attr );
    358372
    359 #if (DEBUG_GPT_ACCESS & 1)
    360 if( DEBUG_GPT_ACCESS < cycle )
     373#if (DEBUG_HAL_GPT_ACCESS & 1)
     374if( DEBUG_HAL_GPT_ACCESS < cycle )
    361375printk("\n[DBG] %s : thread %x / vpn %x / &pt1 %x / tsar_attr %x\n",
    362376__FUNCTION__, CURRENT_THREAD, vpn, pt1, tsar_attr );
     
    392406        pte1 = *pte1_ptr;
    393407       
    394 #if (DEBUG_GPT_ACCESS & 1)
    395 if( DEBUG_GPT_ACCESS < cycle )
     408#if (DEBUG_HAL_GPT_ACCESS & 1)
     409if( DEBUG_HAL_GPT_ACCESS < cycle )
    396410printk("\n[DBG] %s : thread %x / vpn %x / current_pte1 %x\n",
    397411__FUNCTION__, CURRENT_THREAD, vpn, pte1 );
     
    437451            pt2     = (uint32_t *)GET_PTR( ppm_ppn2base( pt2_ppn ) );
    438452
    439 #if (DEBUG_GPT_ACCESS & 1)
    440 if( DEBUG_GPT_ACCESS < cycle )
     453#if (DEBUG_HAL_GPT_ACCESS & 1)
     454if( DEBUG_HAL_GPT_ACCESS < cycle )
    441455printk("\n[DBG] %s : thread %x / vpn %x / pte1 %x / &pt2 %x\n",
    442456__FUNCTION__, CURRENT_THREAD, vpn, pte1, pt2 );
     
    452466        hal_fence();
    453467
    454 #if DEBUG_GPT_ACCESS
     468#if DEBUG_HAL_GPT_ACCESS
    455469cycle = (uint32_t)hal_get_cycles;
    456 if( DEBUG_GPT_ACCESS < cycle )
     470if( DEBUG_HAL_GPT_ACCESS < cycle )
    457471printk("\n[DBG] %s : thread %x exit / vpn %x / pte2_attr %x / pte2_ppn %x / cycle %d\n",
    458472__FUNCTION__, CURRENT_THREAD, vpn, pt2[2 * ix2], pt2[2 * ix2 + 1], cycle );
     
    762776    ppn_t        dst_pt2_ppn;
    763777
    764 #if DEBUG_GPT_ACCESS
     778#if DEBUG_HAL_GPT_ACCESS
    765779uint32_t cycle = (uint32_t)hal_get_cycles;
    766 if( DEBUG_GPT_ACCESS < cycle )
     780if( DEBUG_HAL_GPT_ACCESS < cycle )
    767781printk("\n[DBG] %s : thread %x enter / vpn %x / cycle %d\n",
    768782__FUNCTION__, CURRENT_THREAD, vpn, cycle );
     
    853867            *ppn    = src_pte2_ppn;
    854868       
    855 #if DEBUG_GPT_ACCESS
     869#if DEBUG_HAL_GPT_ACCESS
    856870cycle = (uint32_t)hal_get_cycles;
    857 if( DEBUG_GPT_ACCESS < cycle )
     871if( DEBUG_HAL_GPT_ACCESS < cycle )
    858872printk("\n[DBG] %s : thread %x exit / copy done for vpn %x / cycle %d\n",
    859873__FUNCTION__, CURRENT_THREAD, vpn, cycle );
     
    870884    *ppn    = 0;
    871885   
    872 #if DEBUG_GPT_ACCESS
     886#if DEBUG_HAL_GPT_ACCESS
    873887cycle = (uint32_t)hal_get_cycles;
    874 if( DEBUG_GPT_ACCESS < cycle )
     888if( DEBUG_HAL_GPT_ACCESS < cycle )
    875889printk("\n[DBG] %s : thread %x exit / nothing done for vpn %x / cycle %d\n",
    876890__FUNCTION__, CURRENT_THREAD, vpn, cycle );
  • trunk/hal/tsar_mips32/core/hal_ppm.c

    r432 r443  
    101101        }
    102102
    103 // printk("\n@@@ in %s : reserved = %d / total = %d\n", __FUNCTION__, reserved_pages, pages_nr );
    104 
    105103        // - set PG_RESERVED flag for reserved pages (kernel code & pages_tbl[])
    106104        // - release all other pages to populate the free lists
     
    115113                // TODO optimisation : decompose this enormous set of small pages
    116114                // to several sets of big pages with various order values [AG]
    117 
    118 // if( (i < (reserved_pages+10)) || (i > (pages_nr-5)) ) ppm_print();
    119 
    120115        }
    121116
    122 // assert( false , __FUNCTION__ , "PMM init completed\n");
    123  
    124117        // check consistency
    125118        return ppm_assert_order( ppm );
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