Ignore:
Timestamp:
Jul 5, 2018, 3:45:43 PM (3 years ago)
Author:
alain
Message:

Fix a bug in soclib_pic driver (bad separation between IOPIC an LAPIC initialisation)

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/hal/tsar_mips32/drivers/soclib_pic.c

    r440 r451  
    2222 */
    2323
    24 #include <hal_types.h>
     24#include <hal_kernel_types.h>
    2525#include <chdev.h>
    2626#include <soclib_pic.h>
     
    255255{
    256256    uint32_t    i;      // for loop on IOPIC inputs
    257     uint32_t    x;      // for loop on clusters in a row
    258     uint32_t    y;      // for loop on clusters in a column inputs
    259     uint32_t    lid;    // for loop on cores in a cluster
    260 
    261     // get target architecture parameters
    262     cluster_t * cluster = LOCAL_CLUSTER;
    263     uint32_t    x_size  = cluster->x_size;
    264     uint32_t    y_size  = cluster->y_size;
    265     uint32_t    y_width = cluster->y_width;
    266     uint32_t    ncores  = cluster->cores_nr;
    267257
    268258    // get IOPIC controller cluster and segment base pointer
    269     cxy_t      iopic_seg_cxy = (cxy_t)GET_CXY( pic->base );
    270     uint32_t * iopic_seg_ptr = (uint32_t *)GET_PTR( pic->base );
     259    cxy_t      iopic_seg_cxy = GET_CXY( pic->base );
     260    uint32_t * iopic_seg_ptr = GET_PTR( pic->base );
    271261
    272262    // reset the IOPIC component registers : disable all input IRQs
     
    277267        hal_remote_sw( iopic_seg_xp , 0 );
    278268    }
    279    
    280     // GET XCU controller segment base
    281     uint32_t * base = soclib_pic_xcu_base();
    282 
    283     // reset the XCU component registers in all clusters:
    284     // mask all HWIs, all WTIs, and all PTIs, for all cores   
    285     for( x = 0 ; x < x_size ; x++ )
    286     {
    287         for( y = 0 ; y < y_size ; y++ )
    288         {
    289             for( lid = 0 ; lid < ncores ; lid++ )
    290             {
    291                 cxy_t cxy = (x<<y_width) + y;
    292                 xptr_t hwi_mask_xp = XPTR( cxy , base + (XCU_MSK_HWI_DISABLE << 5 | lid) );
    293                 xptr_t wti_mask_xp = XPTR( cxy , base + (XCU_MSK_WTI_DISABLE << 5 | lid) );
    294                 xptr_t pti_mask_xp = XPTR( cxy , base + (XCU_MSK_PTI_DISABLE << 5 | lid) );
    295                 hal_remote_sw( hwi_mask_xp , 0xFFFFFFFF );
    296                 hal_remote_sw( wti_mask_xp , 0xFFFFFFFF );
    297                 hal_remote_sw( pti_mask_xp , 0xFFFFFFFF );
    298             }
    299         }
    300     }
     269
    301270}  // end soclib_pic_init()
    302271
     
    357326    // register PIC extension in cluster manager
    358327    cluster->pic_extend = cluster_ext_ptr;
     328
     329    // reset the XCU component registers
     330    // mask all HWIs, all WTIs, and all PTIs, for all cores in local cluster   
     331    for( lid = 0 ; lid < cluster->cores_nr ; lid++ )
     332    {
     333        xcu_base[XCU_MSK_HWI_DISABLE << 5 | lid] = 0xFFFFFFFF;
     334        xcu_base[XCU_MSK_WTI_DISABLE << 5 | lid] = 0xFFFFFFFF;
     335        xcu_base[XCU_MSK_PTI_DISABLE << 5 | lid] = 0xFFFFFFFF;
     336    }
    359337
    360338}  // end soclib_pic_extend_init()
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