Changeset 46


Ignore:
Timestamp:
Jun 23, 2017, 1:31:23 PM (4 years ago)
Author:
max@…
Message:

Start implementing TLS.

Location:
trunk/hal/x86_64
Files:
7 edited

Legend:

Unmodified
Added
Removed
  • trunk/hal/x86_64/hal_cpu.S

    r35 r46  
    3939        ret
    4040
     41ASM_ENTRY(rdmsr)
     42        movq    %rdi,%rcx
     43        xorq    %rax,%rax
     44        rdmsr
     45        shlq    $32,%rdx
     46        orq     %rdx,%rax
     47        ret
     48
     49ASM_ENTRY(wrmsr)
     50        movq    %rdi,%rcx
     51        movq    %rsi,%rax
     52        movq    %rsi,%rdx
     53        shrq    $32,%rdx
     54        wrmsr
     55        ret
     56
  • trunk/hal/x86_64/hal_init.c

    r45 r46  
    4747uint8_t mb_mmap[PAGE_SIZE] __in_kdata;
    4848
    49 #define offsetof(type, member) __builtin_offsetof(type, member)
    50 
    5149/* -------------------------------------------------------------------------- */
    5250
     
    5957
    6058        if (!(mb_info.mi_flags & MULTIBOOT_INFO_HAS_MMAP))
    61                 x86_printf("SHIT!!\n");
     59                x86_panic("No mmap");
    6260
    6361        i = 0;
     
    104102        x86_printf("[+] hal_gpt_bootstrap_reset called\n");
    105103
    106         hal_init_lapic();
    107         x86_printf("[+] hal_init_lapic called\n");
     104        hal_lapic_init();
     105        x86_printf("[+] hal_lapic_init called\n");
     106
     107        hal_tls_init_cpu0();
     108        x86_printf("[+] hal_tls_init_cpu0 called\n");
    108109
    109110        x86_printf("-> mytest = %z\n", mytest);
     
    232233                    SDT_SYS386IGT, SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL));
    233234        }
    234 
    235235}
    236236
  • trunk/hal/x86_64/hal_internal.h

    r45 r46  
    2020 */
    2121
     22#define offsetof(type, member) __builtin_offsetof(type, member)
    2223#define roundup(x, y) ((((x)+((y)-1))/(y))*(y))
    2324#define rounddown(x,y) (((x)/(y))*(y))
     
    3031/* hal_cpu.S */
    3132void invlpg(vaddr_t va);
     33uint64_t rdmsr(uint32_t);
     34void wrmsr(uint32_t, uint64_t);
    3235
    3336/* hal_gpt.c */
     
    4144void hal_gpt_init(paddr_t firstpa);
    4245
     46/* hal_special.c */
     47void hal_tls_init_cpu0();
     48
    4349/* x86_printf.c */
    4450void x86_panic(char *msg);
  • trunk/hal/x86_64/hal_lapic.c

    r45 r46  
    3737vaddr_t lapic_va __in_kdata = 0;
    3838
    39 void lapic_write(uint32_t reg, uint32_t val)
     39void hal_lapic_write(uint32_t reg, uint32_t val)
    4040{
    4141        *((volatile uint32_t *)(lapic_va + reg)) = val;
    4242}
    4343
    44 uint32_t lapic_read(uint32_t reg)
     44uint32_t hal_lapic_read(uint32_t reg)
    4545{
    4646        return *((volatile uint32_t *)(lapic_va + reg));
    4747}
    4848
    49 void hal_init_lapic()
     49uint32_t hal_lapic_gid()
    5050{
    51         uint32_t id;
     51        return hal_lapic_read(LAPIC_ID) >> LAPIC_ID_SHIFT;
     52}
    5253
     54void hal_lapic_init()
     55{
    5356        lapic_va = hal_gpt_bootstrap_valloc(1); // XXX: should be shared
    5457
    5558        hal_gpt_enter(lapic_va, lapic_pa);
    5659
    57         lapic_write(LAPIC_TPR, 0);
    58         lapic_write(LAPIC_SVR, LAPIC_SVR_ENABLE|LAPIC_SPURIOUS_VECTOR);
    59 
    60         id = lapic_read(LAPIC_ID) >> LAPIC_ID_SHIFT;
    61 
    62         x86_printf("-> LAPIC id: %d\n", id);
     60        hal_lapic_write(LAPIC_TPR, 0);
     61        hal_lapic_write(LAPIC_SVR, LAPIC_SVR_ENABLE|LAPIC_SPURIOUS_VECTOR);
    6362}
    6463
  • trunk/hal/x86_64/hal_lapic.h

    r45 r46  
    2020 */
    2121
    22 void hal_init_lapic();
     22uint32_t hal_lapic_gid();
     23void hal_lapic_init();
    2324
    2425#define LAPIC_SPURIOUS_VECTOR   LAPICVEC_MIN
  • trunk/hal/x86_64/hal_register.h

    r29 r46  
    7272#define         EFER_TCE        0x00008000      /* Translation Cache Ext. */
    7373
     74#define MSR_STAR        0xc0000081              /* 32 bit syscall gate addr */
     75#define MSR_LSTAR       0xc0000082              /* 64 bit syscall gate addr */
     76#define MSR_CSTAR       0xc0000083              /* compat syscall gate addr */
     77#define MSR_SFMASK      0xc0000084              /* flags to clear on syscall */
     78
     79#define MSR_FSBASE      0xc0000100              /* 64bit offset for fs: */
     80#define MSR_GSBASE      0xc0000101              /* 64bit offset for gs: */
     81#define MSR_KERNELGSBASE 0xc0000102             /* storage for swapgs ins */
     82
  • trunk/hal/x86_64/hal_special.c

    r25 r46  
    11/*
    2  * hal_special.c - implementation of Generic Special Register Access API for TSAR-MIPS32
     2 * hal_special.c - implementation of TLS API for x86_64
    33 *
    4  * Author  Ghassan Almaless (2008,2009,2010,2011,2012)
    5  *         Alain Greiner    (2016)
     4 * Copyright (c) 2017 Maxime Villard
     5 *
     6 * This file is part of ALMOS-MKH.
    67 *
    7  * Copyright (c) UPMC Sorbonne Universites
    8  *
    9  * This file is part of ALMOS-MKH..
    10  *
    11  * ALMOS-MKH. is free software; you can redistribute it and/or modify it
     8 * ALMOS-MKH is free software; you can redistribute it and/or modify it
    129 * under the terms of the GNU General Public License as published by
    1310 * the Free Software Foundation; version 2.0 of the License.
    1411 *
    15  * ALMOS-MKH. is distributed in the hope that it will be useful, but
     12 * ALMOS-MKH is distributed in the hope that it will be useful, but
    1613 * WITHOUT ANY WARRANTY; without even the implied warranty of
    1714 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     
    2320 */
    2421
    25 
    2622#include <hal_types.h>
     23#include <hal_lapic.h>
    2724#include <hal_special.h>
    28 
    29 /****  Forward declarations ****/
     25#include <hal_register.h>
     26#include <hal_internal.h>
    3027
    3128struct thread_s;
    3229
     30typedef struct cpu_info {
     31        void *ci_self;
     32        uint32_t ci_gid;
     33        uint32_t ci_lid;
     34        struct thread_s *ci_thr;
     35} cpu_info_t;
     36
     37cpu_info_t cpu0 __in_kdata;
     38
     39cpu_info_t *curcpu()
     40{
     41        cpu_info_t *ci;
     42
     43        __asm volatile("movq %%gs:%1, %0" :
     44            "=r" (ci) :
     45            "m"
     46            (*(cpu_info_t * const *)offsetof(cpu_info_t, ci_self)));
     47        return ci;
     48}
     49
     50static void hal_tls_load_cpu(cpu_info_t *ci)
     51{
     52        wrmsr(MSR_FSBASE, 0);
     53        wrmsr(MSR_GSBASE, (uint64_t)ci);
     54        wrmsr(MSR_KERNELGSBASE, 0);
     55}
     56
     57void hal_tls_init_cpu0()
     58{
     59        cpu_info_t *ci = &cpu0;
     60
     61        memset(ci, 0, sizeof(cpu_info_t));
     62
     63        ci->ci_self = ci;
     64        ci->ci_gid = hal_lapic_gid();
     65        ci->ci_lid = 0; /* XXX */
     66
     67        hal_tls_load_cpu(ci);
     68}
     69
    3370gid_t hal_get_gid()
    3471{
    35         return 0;
     72        x86_panic((char *)__func__);
     73        return curcpu()->ci_gid;
    3674}
    3775
    3876uint32_t hal_time_stamp()
    3977{
     78        x86_panic((char *)__func__);
    4079        return 0;
    4180}
     
    4382struct thread_s * hal_get_current_thread()
    4483{
    45         return NULL;
     84        x86_panic((char *)__func__);
     85        return curcpu()->ci_thr;
    4686}
    4787
    4888void hal_set_current_thread( struct thread_s * thread )
    4989{
     90        x86_panic((char *)__func__);
     91        curcpu()->ci_thr = thread;
     92}
    5093
    51 }
     94/* -------------------------------------------------------------------------- */
    5295
    5396void hal_fpu_enable()
    5497{
    55 
     98        x86_panic((char *)__func__);
    5699}
    57100
    58101void hal_fpu_disable()
    59102{
    60 
     103        x86_panic((char *)__func__);
    61104}
    62105
    63106uint32_t hal_get_stack()
    64107{
     108        x86_panic((char *)__func__);
    65109        return 0;
    66110}
     
    68112uint32_t hal_set_stack( void * new_val )
    69113{
     114        x86_panic((char *)__func__);
    70115        return 0;
    71116}
     
    73118uint32_t hal_get_bad_vaddr()
    74119{
     120        x86_panic((char *)__func__);
    75121        return 0;
    76122}
     
    78124uint32_t hal_uncached_read( uint32_t * ptr )
    79125{
     126        x86_panic((char *)__func__);
    80127        return 0;
    81128}
     
    83130void hal_invalid_dcache_line( void * ptr )
    84131{
    85 
     132        x86_panic((char *)__func__);
    86133}
    87134
    88135void hal_wbflush()
    89136{
    90 
     137        x86_panic((char *)__func__);
    91138}
    92139
    93140void hal_rdbar()
    94141{
    95 
     142        x86_panic((char *)__func__);
    96143}
    97144
    98145void hal_core_sleep()
    99146{
    100 
     147        x86_panic((char *)__func__);
    101148}
    102149
    103150void hal_fixed_delay( uint32_t delay )
    104151{
    105 
     152        x86_panic((char *)__func__);
    106153}
    107154
     
    111158                       intptr_t * mmu_dat_bad_vaddr )
    112159{
    113 
     160        x86_panic((char *)__func__);
    114161}
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