Changeset 623 for trunk/hal/tsar_mips32/core/hal_special.c
- Timestamp:
- Mar 6, 2019, 4:37:15 PM (5 years ago)
- File:
-
- 1 edited
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trunk/hal/tsar_mips32/core/hal_special.c
r619 r623 33 33 struct thread_s; 34 34 35 36 ////////////////////////////////////////////////////////////////////////////////// 37 // Extern global variables 38 ////////////////////////////////////////////////////////////////////////////////// 39 40 extern cxy_t local_cxy; 41 extern void hal_kentry_enter( void ); 42 43 ///////////////////////////////////////////////////////////////////////////////// 44 // For the TSAR architecture, this function register the physical address of 45 // the first level page table (PT1) in the PTPR register. 46 // It activates the intructions MMU, and de-activates the data MMU. 47 ///////////////////////////////////////////////////////////////////////////////// 48 void hal_mmu_init( gpt_t * gpt ) 49 { 50 51 // set PT1 base address in mmu_ptpr register 52 uint32_t ptpr = (((uint32_t)gpt->ptr) >> 13) | (local_cxy << 19); 53 asm volatile ( "mtc2 %0, $0 \n" : : "r" (ptpr) ); 54 55 // set ITLB | ICACHE | DCACHE bits in mmu_mode register 56 asm volatile ( "ori $26, $0, 0xB \n" 57 "mtc2 $26, $1 \n" ); 58 } 59 60 //////////////////////////////////////////////////////////////////////////////// 61 // For the TSAR architecture, this function registers the address of the 62 // hal_kentry_enter() function in the MIPS32 cp0_ebase register. 63 //////////////////////////////////////////////////////////////////////////////// 64 void hal_set_kentry( void ) 65 { 66 uint32_t kentry = (uint32_t)(&hal_kentry_enter); 67 68 asm volatile("mtc0 %0, $15, 1" : : "r" (kentry) ); 69 } 70 35 71 //////////////////////////////// 36 72 inline gid_t hal_get_gid( void )
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