Changeset 654


Ignore:
Timestamp:
Nov 14, 2019, 4:03:25 PM (2 years ago)
Author:
alain
Message:

euh...

Location:
trunk/hal
Files:
8 edited

Legend:

Unmodified
Added
Removed
  • trunk/hal/generic/hal_context.h

    r625 r654  
    4949
    5050/****************************************************************************************
    51  * This function initializes a CPU context from scratch.
     51 * This function initializes the CPU context of the thread identified by the <thread>
     52 * argument. All slots required to start a new thread must be initialized.
    5253 ****************************************************************************************
    5354 * @ thread  : pointer on the thread descriptor.
  • trunk/hal/generic/hal_switch.h

    r457 r654  
    6060 * It restore the calling CPU register values from a CPU context identified by <ctx>.
    6161 * The architecture specific hal_cpu_context_t structure used to store a CPU context
    62  * is defined in the architecture specific hal_context.c file.
    63  * When the restore is completed, it simply jumps to the address contained in ra_31.
    64  * In ALMOS-MKH, ra_31 must contain a pointer on the eret() function, and c0_epc
    65  * must contain the new main thread entry point.
     62 * is defined in the architecture specific hal_context.c file. When the restore is
     63 * completed, it jumps to the entry point of the new process main thread.
     64 *
     65 * Implementation Note :
     66 * - on the TSAR architecture, register ra_31 must contain a pointer on the
     67 *   eret() function, and register c0_epc  must contain the new thread entry point.
     68 * - on I86 architecture TODO...
    6669 *************************************************************************************
    6770 * @ ctx     : local pointer on CPU context.
  • trunk/hal/tsar_mips32/core/hal_context.c

    r647 r654  
    176176        context->c2_mode = 0x3;
    177177    }
     178
     179#if DEBUG_HAL_CONTEXT_INIT
     180hal_cpu_context_display( XPTR( local_cxy , thread ) );
     181#endif
     182
    178183}  // end hal_cpu_context_init()
    179184
     
    235240    hal_remote_spt( XPTR( child_cxy , &child_ptr->uzone_current ) , child_uzone );
    236241
    237 #if DEBUG_HAL_CONTEXT
     242#if DEBUG_HAL_CONTEXT_FORK
    238243uint32_t cycle = (uint32_t)hal_get_cycles();
    239 if( DEBUG_HAL_CONTEXT < cycle )
     244if( DEBUG_HAL_CONTEXT_FORK < cycle )
    240245printk("\n[%s] thread[%x,%x] parent_uzone %x / child_uzone %x / cycle %d\n",
    241246__FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_uzone, child_uzone, cycle );
     
    249254    child_us_base  = hal_remote_l32( XPTR( child_cxy , &child_us_vseg->min ) );
    250255
    251 #if DEBUG_HAL_CONTEXT
    252 if( DEBUG_HAL_CONTEXT < cycle )
     256#if DEBUG_HAL_CONTEXT_FORK
     257if( DEBUG_HAL_CONTEXT_FORK < cycle )
    253258printk("\n[%s] thread[%x,%x] parent_ustack_base %x / child_ustack_base %x\n",
    254259__FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_us_base, child_us_base );
     
    263268                          (intptr_t)parent_ptr );
    264269
    265 #if DEBUG_HAL_CONTEXT
    266 if( DEBUG_HAL_CONTEXT < cycle )
     270#if DEBUG_HAL_CONTEXT_FORK
     271if( DEBUG_HAL_CONTEXT_FORK < cycle )
    267272printk("\n[%s] thread[%x,%x] parent_ksp %x / child_ksp %x\n",
    268273__FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_ksp, child_ksp );
     
    278283                       size );
    279284
    280 #if DEBUG_HAL_CONTEXT
    281 if( DEBUG_HAL_CONTEXT < cycle )
     285#if DEBUG_HAL_CONTEXT_FORK
     286if( DEBUG_HAL_CONTEXT_FORK < cycle )
    282287printk("\n[%s] thread[%x,%x] copied kstack from parent (%x) to child (%x)\n",
    283288__FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_ptr, child_ptr );
     
    311316        uint32_t child_ptpr  = (uint32_t)child_gpt_ppn >> 1;
    312317
    313 #if DEBUG_HAL_CONTEXT
    314 if( DEBUG_HAL_CONTEXT < cycle )
     318#if DEBUG_HAL_CONTEXT_FORK
     319if( DEBUG_HAL_CONTEXT_FORK < cycle )
    315320printk("\n[%s] thread[%x,%x] : parent_uz_sp %x / child_uz_sp %x\n",
    316321__FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid,
     
    327332                           XPTR( local_cxy  , &context ) ,
    328333                           sizeof( hal_cpu_context_t ) );
    329 #if DEBUG_HAL_CONTEXT
    330 if( DEBUG_HAL_CONTEXT < cycle )
     334#if DEBUG_HAL_CONTEXT_FORK
     335if( DEBUG_HAL_CONTEXT_FORK < cycle )
    331336printk("\n[%s] thread[%x,%x] copied parent CPU context to child CPU context\n",
    332337__FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid );
     
    336341        thread_unblock( XPTR( child_cxy , child_ptr ) , THREAD_BLOCKED_GLOBAL );
    337342
    338 #if DEBUG_HAL_CONTEXT
     343#if DEBUG_HAL_CONTEXT_FORK
    339344cycle = (uint32_t)hal_get_cycles();
    340345trdid_t child_trdid = hal_remote_l32( XPTR( child_cxy , &child_ptr->trdid ) );
  • trunk/hal/tsar_mips32/core/hal_kentry.S

    r625 r654  
    2424 */
    2525
    26 #define      UZ_MODE         0                
     26#define      UZ_MODE_DEXT    0             
    2727#define      UZ_AT           1
    2828#define      UZ_V0           2
     
    8686
    8787#------------------------------------------------------------------------------------
    88 # Kernel Entry point for Interrupt / Exception / Syscall
    89 # The c2_dext CP2 register must have been previously set
    90 # to "local_cxy", because the kernel run with data MMU desactivated.
     88#       Kernel Entry point for Interrupt / Exception / Syscall
     89#  At kernel entry, the relevant CPU, CP0, & CP2 registers are saved
     90#  in a "UZONE" implemented in  the calling thread kernel stack.
     91#  All these registers are restored from the UZONE after the kernel
     92#  completes the requested service.
     93#
     94#  Implementation note: As this code can be executed when the core is already
     95#  in kernel mode (after a syscall, the core must handle interrupts, or
     96#  non-fatal MMU exceptions), this code implement a two slots stack of UZONE(s).
    9197#------------------------------------------------------------------------------------
    9298
    9399hal_kentry_enter:
    94100
    95         mfc0    $26,    $12                 # get c0_sr
    96         andi    $26,    $26,  0x10          # test User Mode bit
    97         beq     $26,    $0,       kernel_mode   # jump if core already in kernel
    98         ori     $27,    $0,       0xB           # $27 <= code data MMU OFF
     101#------------------------------------------------------------------------------------
     102# This code made the following actions:
     103# - save CP2_MMU_MODE & CP2_MMU_DEXT in $26,
     104# - set local_cxy into CP2_MMU_DEXT,
     105# - desactivate DATA MMU in CP2_MMU_MODE,
     106# - test if the core is already in kernel mode.
     107
     108    mfc2    $26,    $1                  # $26 <= CP2_MMU_MODE
     109        andi    $27,    $26,  0xB           # $27 <= code data MMU OFF
     110        mtc2    $27,    $1                              # set data MMU OFF
     111
     112    mfc2    $27,    $24                 # $27 <= CP2_MMU_DEXT
     113    sll     $27,    $27,  4             # $27 <= CP2_MMU_DEXT << 4
     114    or      $26,    $26,  $27           # $26 <= CP2_MMU_DEXT | CP2_MMU_MODE
     115
     116    mfc0    $27,    $15,  1             # $27 <= core CP0_EBASE         
     117    andi    $27,    $27,  0xFFF         # $27 <= gid
     118    srl     $27,    $27,  2             # $27 <= local_cxy
     119    mtc2    $27,    $24                 # CP2_MMU_DEXT <= local_cxy
     120
     121        mfc0    $27,    $12                 # $27 <= CP0_SR
     122        andi    $27,    $27,  0x10          # test User Mode bit
     123        beq     $27,    $0,       kernel_mode   # jump if core already in kernel
     124    nop
    99125       
    100126#------------------------------------------------------------------------------------
    101127# This code is executed when the core is in user mode,
    102 # to handle a syscall, an interrupt, or an user exception.
    103 # - save current c2_mode in $26.
    104 # - set data MMU OFF.
     128# to handle a syscall, an interrupt, or an exception.
    105129# - copy user stack pointer in $27 to be saved in uzone.
    106130# - set kernel stack pointer in $29 (kernel stack empty at firts entry).
     
    108132user_mode:
    109133
    110     mfc2    $26,    $1                  # $26 <= c2_mode
    111         mtc2    $27,    $1                              # set data MMU OFF
    112134    move    $27,    $29                 # $27 <= user stack pointer
    113135        mfc0    $29,    $4,   2             # get pointer on thread descriptor from c0_th
     
    119141#------------------------------------------------------------------------------------
    120142# This code is executed when the core is already in kernel mode,
    121 # after a syscall, to handle an interrupt, or to handle a non-fatal exception.
    122 # - save current c2_mode in $26.
    123 # - set data MMU OFF.
     143# (after a syscall), to handle an interrupt, or a non-fatal exception.
    124144# - copy current kernel stack pointer in $27.
    125145
    126146kernel_mode:
    127147
    128     mfc2    $26,    $1                  # $26 <= c2_mode
    129         mtc2    $27,    $1                              # set data MMU OFF
    130148    move    $27,    $29                 # $27 <= current kernel stack pointer
     149    j       unified_mode
     150    nop
    131151
    132152#------------------------------------------------------------------------------------   
    133 # This code is executed in both modes (user or kernel):
    134 # The assumptions are:
    135 # - c2_mode contains the data MMU OFF value.
    136 # - $26 contains the previous c2_mode value.
    137 # - $27 contains the previous sp value (can be usp or ksp).
    138 # - $29 contains the curren kernel stack pointer.
    139 # We execute the following actions:
     153# This code is executed in both modes (user or kernel).
     154# It executes the following actions:
    140155# - decrement $29 to allocate an uzone in kernel stack
    141156# - save GPR, CP0 and CP2 registers to uzone.
    142157# - set the SR in kernel mode: IRQ disabled, clear EXL.
     158# The assumptions are:
     159# - c2_mode contains the data MMU OFF value.
     160# - $26 contains the previous c2_mode and c2_dext values.
     161# - $27 contains the previous sp value (can be usp or ksp).
     162# - $29 contains the current kernel stack pointer.
    143163
    144164unified_mode:
    145165
    146         addiu   $29,    $29,  -(UZ_REGS*4)      # allocate uzone in kernel stack
    147 
     166        addiu   $29,    $29,  -(UZ_REGS*4)         # allocate uzone in kernel stack
     167
     168    sw      $26,    (UZ_MODE_DEXT*4)($29)  # save previous c2_mode and c2_dext values
    148169        sw      $1,         (UZ_AT*4)($29)
    149170        sw      $2,     (UZ_V0*4)($29)
     
    173194
    174195        mflo    $1
    175         sw      $1,     (UZ_LO*4)($29)      # save lo
     196        sw      $1,     (UZ_LO*4)($29)         # save lo
    176197        mflo    $1
    177         sw      $1,     (UZ_HI*4)($29)      # save hi
    178 
    179         sw          $28,        (UZ_GP*4)($29)      # save gp
    180         sw          $27,        (UZ_SP*4)($29)      # save previous sp (can be usp or ksp)
    181         sw          $30,        (UZ_S8*4)($29)      # save s8
    182         sw          $31,        (UZ_RA*4)($29)      # save ra
     198        sw      $1,     (UZ_HI*4)($29)         # save hi
     199
     200        sw          $28,        (UZ_GP*4)($29)         # save gp
     201        sw          $27,        (UZ_SP*4)($29)         # save previous sp (can be usp or ksp)
     202        sw          $30,        (UZ_S8*4)($29)         # save s8
     203        sw          $31,        (UZ_RA*4)($29)         # save ra
    183204
    184205        mfc0    $1,     $14
    185         sw      $1,     (UZ_EPC*4)($29)     # save c0_epc
     206        sw      $1,     (UZ_EPC*4)($29)        # save c0_epc
    186207        mfc0    $1,         $12
    187         sw          $1,     (UZ_SR*4)($29)              # save c0_sr
     208        sw          $1,     (UZ_SR*4)($29)                 # save c0_sr
    188209        mfc0    $1,     $4,  2
    189         sw      $1,         (UZ_TH*4)($29)              # save c0_th
     210        sw      $1,         (UZ_TH*4)($29)                 # save c0_th
    190211        mfc0    $1,     $13   
    191         sw      $1,         (UZ_CR*4)($29)              # save c0_cr
     212        sw      $1,         (UZ_CR*4)($29)                 # save c0_cr
    192213        mfc2    $1,     $0
    193         sw      $1,     (UZ_PTPR*4)($29)        # save c2_ptpr
    194 
    195     sw      $26,    (UZ_MODE*4)($29)    # save previous c2_mode (can be user or kernel)
    196 
    197     mfc0    $3,     $12                 # $3 <= c0_sr
     214        sw      $1,     (UZ_PTPR*4)($29)           # save c2_ptpr
     215
     216
     217    mfc0    $3,     $12                    # $3 <= c0_sr
    198218        srl         $3,     $3,   5
    199         sll     $3,         $3,   5                 # reset 5 LSB bits
    200         mtc0    $3,         $12                         # set new c0_sr
     219        sll     $3,         $3,   5                    # reset 5 LSB bits
     220        mtc0    $3,         $12                            # set new c0_sr
    201221
    202222#--------------------
     
    271291    jal     puts
    272292    nop   
    273     # display saved MODE value
     293    # display saved MODE & DEXT values
    274294    la      $4,     msg_mode
    275295    jal     puts
    276296    nop
    277     lw      $4,         (UZ_MODE*4)($29)
     297    lw      $4,         (UZ_MODE_DEXT*4)($29)
    278298    jal     putx
    279299    nop
     
    430450    jal     puts
    431451    nop   
    432     # display saved MODE value
     452    # display saved MODE_DEXT value
    433453    la      $4,     msg_mode
    434454    jal     puts
    435455    nop
    436     lw      $4,         (UZ_MODE*4)($29)
     456    lw      $4,         (UZ_MODE_DEXT*4)($29)
    437457    jal     putx
    438458    nop
     
    498518        lw          $31,        (UZ_RA*4)($27)      # restore ra_31 from uzone
    499519
    500         lw          $26,    (UZ_MODE*4)($27)   
    501     mtc2    $26,    $1                  # restore c2_mode from uzone
     520        lw          $26,    (UZ_MODE_DEXT*4)($27)   
     521    srl     $27,    $26,  4             # $27 <= CP2_DEXT
     522    mtc2    $27,    $24                 # restore c2_dest from uzone
     523    andi    $27,    $26,  0xF           # $27 <= CP2_MODE
     524    mtc2    $27,    $1                  # restore c2_mode from uzone
    502525
    503526# -----------------------------------------------------------------------------------
  • trunk/hal/tsar_mips32/core/hal_uspace.c

    r647 r654  
    3636// It works in a critical section, as it modifies two CP2 registers:
    3737// It activates briefly the DATA_MMU by writing into the CP2_MODE register to access the
    38 // user buffer, and modifies the CP2_DATA_EXT register to access the kernel buffer.
     38// user buffer, and modifies the CP2_DEXT register to access the kernel buffer.
    3939// If the two buffers are aligned on a word boundary, it moves the data word per word
    4040// in a first loop, and moves byte per byte the remaining bytes in a second loop.
     
    8080                  "ori    $13,   $12,   0x4       \n"   /* $13 <= MMU_MODE with DTLB  */
    8181
    82                   /* save old MMU_DATA_EXT and set cxy in it                      */
    83                   "mfc2   $16,   $24          \n"   /* $16 <= old MMU_DATA_EXT    */
    84                   "mtc2   %4,    $24          \n"   /* MMU_DATA_EXT <= cxy        */
     82                  /* save MMU_DEXT register                                       */
     83                  "mfc2   $16,   $24          \n"   /* $16 <= old MMU_DEXT        */
     84                  "mtc2   %4,    $24          \n"   /* MMU_DEXT <= dst_cxy        */
    8585
    8686                  /* transfer one word per iteration in first loop if aligned     */
     
    113113                  "addi   $9,    $9,    1     \n"   /* dst += 1 byte              */
    114114
    115                   /* restore old MMU_DATA_EXT register                            */
     115                  /* restore MMU_DEXT register                                    */
    116116                  "4:                         \n"
    117                   "mtc2   $16,   $24          \n"   /* MMU__DATA_EXT <= $16       */
     117                  "mtc2   $16,   $24          \n"   /* MMU_DEXT <= $16            */
    118118                  ".set reorder               \n"
    119119                  :
     
    139139// It works in a critical section, as it modifies two CP2 registers:
    140140// It activates briefly the DATA_MMU by writing into the CP2_MODE register to access the
    141 // user buffer, and modifies the CP2_DATA_EXT register to access the kernel buffer.
     141// user buffer, and modifies the CP2_DEXT register to access the kernel buffer.
    142142// If the two buffers are aligned on a word boundary, it moves the data word per word
    143143// in a first loop, and moves byte per byte the remaining bytes in a second loop.
     
    182182                  "ori    $13,   $12,   0x4       \n"   /* $13 <= MMU_MODE with DTLB  */
    183183
    184                   /* save old MMU_DATA_EXT and set cxy in it                      */
    185                   "mfc2   $16,   $24          \n"   /* $16 <= old MMU_DATA_EXT    */
    186                   "mtc2   %4,    $24          \n"   /* MMU_DATA_EXT <= cxy        */
     184                  /* save MMU_DEXT register                                       */
     185                  "mfc2   $16,   $24          \n"   /* $16 <= old MMU_DEXT        */
     186                  "mtc2   %4,    $24          \n"   /* MMU_DEXT <= cxy            */
    187187
    188188                  /* transfer one word per iteration in first loop if aligned     */
     
    215215                  "addi   $9,    $9,    1     \n"   /* dst += 1 byte              */
    216216
    217                   /* restore old MMU_DATA_EXT register                            */
     217                  /* restore MMU_DEXT register                                    */
    218218                  "4:                         \n"
    219                   "mtc2   $16,   $24          \n"   /* MMU__DATA_EXT <= $16       */
     219                  "mtc2   $16,   $24          \n"   /* MMU_DEXT <= $16            */
    220220                  ".set reorder               \n"
    221221                  :
     
    252252        ".set noreorder             \n"
    253253
    254         /* save old MMU_DATA_EXT and set cxy in it                          */
    255         "mfc2   $16,   $24          \n"   /* $16 <= old MMU_DATA_EXT        */
    256         "mtc2   %3,    $24          \n"   /* MMU_DATA_EXT <= cxy            */
     254        /* save old MMU_DEXT and set cxy in it                              */
     255        "mfc2   $16,   $24          \n"   /* $16 <= old MMU_DEXT            */
     256        "mtc2   %3,    $24          \n"   /* MMU_DEXT <= cxy                */
    257257
    258258        "move   $11,   %0           \n"   /* $11 <= count == size           */
     
    276276        "nop                        \n"
    277277
    278         /* restore old MMU_DATA_EXT register                                */
    279         "mtc2   $16,   $24          \n"   /* MMU_DATA_EXT <= $16            */
     278        /* restore old MMU_DEXT register                                    */
     279        "mtc2   $16,   $24          \n"   /* MMU_DEXT <= $16                */
    280280
    281281        ".set reorder               \n"
     
    305305        ".set noreorder             \n"
    306306
    307         /* save old MMU_DATA_EXT and set cxy in it                          */
    308         "mfc2   $16,   $24          \n"   /* $16 <= old MMU_DATA_EXT        */
    309         "mtc2   %3,    $24          \n"   /* MMU_DATA_EXT <= cxy            */
     307        /* save old MMU_DEXT and set cxy in it                              */
     308        "mfc2   $16,   $24          \n"   /* $16 <= old MMU_DEXT            */
     309        "mtc2   %3,    $24          \n"   /* MMU_DEXT <= cxy                */
    310310
    311311        "move   $11,   %0           \n"   /* $11 <= count == size           */
     
    329329        "nop                        \n"
    330330
    331         /* restore old MMU_DATA_EXT register                                */
    332         "mtc2   $16,   $24          \n"   /* MMU_DATA_EXT <= $16            */
     331        /* restore old MMU_DEXT register                                    */
     332        "mtc2   $16,   $24          \n"   /* MMU_DEXT <= $16                */
    333333
    334334        ".set reorder               \n"
  • trunk/hal/tsar_mips32/drivers/soclib_fbf.c

    r647 r654  
    7272#if (DEBUG_HAL_FBF|| DEBUG_HAL_FBF)
    7373uint32_t    cycle        = (uint32_t)hal_get_cycles();
    74 thread_t  * this         = CURRENT_THREAD;
    7574process_t * process      = hal_remote_lpt( XPTR( th_cxy , &th_ptr->process ) );
    7675pid_t       client_pid   = hal_remote_l32( XPTR( th_cxy , &process->pid ) );
     
    9897#if DEBUG_HAL_FBF
    9998if( DEBUG_HAL_FBF < cycle )
    100 printk("\n[%s] thread[%x,%x] / client[%x,%x] / READ / offset / length / buffer %x / cycle %d\n",
    101 __FUNCTION__ , this->process->pid, this->trdid,  client_pid, client_trdid,
    102 offset, length, buffer, cycle );
     99printk("\n[%s] client thread[%x,%x] / READ / offset %d / length %d / buffer %x / fbf (%x,%x)\n",
     100__FUNCTION__ , client_pid, client_trdid,
     101offset, length, buffer, GET_CXY(base_xp), GET_PTR(base_xp) );
    103102#endif
    104103        hal_copy_to_uspace( buffer,
    105104                            base_xp + offset,
    106105                            length );
     106#if DEBUG_HAL_FBF
     107if( DEBUG_HAL_FBF < cycle )
     108printk("\n[%s] client thread[%x,%x] / READ successful / cycle %d\n",
     109__FUNCTION__ , client_pid, client_trdid , cycle );
     110#endif
    107111
    108112    }
     
    112116#if DEBUG_HAL_FBF
    113117if( DEBUG_HAL_FBF < cycle )
    114 printk("\n[%s] thread[%x,%x] / client[%x,%x] / WRITE / offset / length / buffer %x / cycle %d\n",
    115 __FUNCTION__ , this->process->pid, this->trdid, client_pid, client_trdid,
    116 offset, length, buffer, cycle );
     118printk("\n[%s] client thread[%x,%x] / WRITE / offset %d / length %d / buffer %x / fbf (%x,%x)\n",
     119__FUNCTION__ , client_pid, client_trdid,
     120offset, length, buffer, GET_CXY(base_xp), GET_PTR(base_xp) );
    117121#endif
    118122        hal_copy_from_uspace( base_xp + offset,
    119123                              buffer,
    120124                              length );
     125#if DEBUG_HAL_FBF
     126if( DEBUG_HAL_FBF < cycle )
     127printk("\n[%s] client thread[%x,%x] / WRITE successful / cycle %d\n",
     128__FUNCTION__ , client_pid, client_trdid , cycle );
     129#endif
     130
    121131    }
    122132
  • trunk/hal/tsar_mips32/drivers/soclib_fbf.h

    r647 r654  
    3232 *
    3333 * This hardware component supports both a frame buffer, and a set of addressable
    34  * configuration status registers.
     34 * configuration/status registers.
    3535 ***************************************************************************************/
    3636
    3737/****************************************************************************************
    3838 *                    SOCLIB_FBF registers offsets
    39  * The three addressables registers are on top  of the 4 Mbytes allocated
    40  * to the frame buffer itself.
     39 * The three addressables registers are on top  of the 4 Mbytes containing
     40 * the frame buffer itself.
    4141 ***************************************************************************************/
    4242
  • trunk/hal/tsar_mips32/drivers/soclib_mmc.c

    r626 r654  
    116116
    117117    // get faulty ADDRESS and SRCID from MMC registers
    118     uint32_t paddr_lo = *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_ADDR_LO);
    119     uint32_t paddr_hi = *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_ADDR_HI);
    120     uint32_t srcid    = *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_SRCID);
     118    uint32_t paddr_lo = *(base + MMC_REG( SOCLIB_MMC_ERROR_FUNC , SOCLIB_MMC_ERROR_ADDR_LO ) );
     119    uint32_t paddr_hi = *(base + MMC_REG( SOCLIB_MMC_ERROR_FUNC , SOCLIB_MMC_ERROR_ADDR_HI ) );
     120    uint32_t srcid    = *(base + MMC_REG( SOCLIB_MMC_ERROR_FUNC , SOCLIB_MMC_ERROR_SRCID ) );
    121121
    122     paddr_t paddr = (((paddr_t)paddr_hi)<<32) + ((paddr_t)paddr_lo);
     122    // print an error message on kernel terminal
     123    printk("\n[ERROR] reported from MMC : cxy %x / cycle %d / bad address [%x,%x] / srcid %x\n",
     124    local_cxy , (uint32_t)hal_get_cycles() , paddr_hi , paddr_lo , srcid );
     125
     126    // reset MMC IRQ
     127    *(base + MMC_REG(SOCLIB_MMC_ERROR_FUNC , SOCLIB_MMC_ERROR_IRQ_RESET) ) = 0;
    123128   
    124     // reset MMC IRQ
    125     *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_IRQ_RESET) = 0;
    126    
    127     // print an error message on kernel terminal TODO : should be improved
    128     printk("\n[ERROR] reported from MMC in cluster %x : faulty address = %l / srcid = %x\n",
    129            paddr , srcid );
    130 
    131129} // end soclib_mmc_isr()
    132130
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