Changeset 686 for trunk/hal/tsar_mips32/drivers/soclib_nic.h

Timestamp:

Jan 13, 2021, 12:47:53 AM (3 years ago)

Author:

alain

Message:

cosmetic

File:

• trunk/hal/tsar_mips32/drivers/soclib_nic.h (modified) (5 diffs)

trunk/hal/tsar_mips32/drivers/soclib_nic.h

@@ -26 +26 @@
 
 #include <chdev.h>
+#include <kernel_config.h>
 #include <hal_kernel_types.h>
 
@@ -43 +44 @@
  * in two memory mapped software FIFOs, called NIC_TX_QUEUE and NIC_RX_QUEUE, implemented
  * as chained buffers (chbuf). Each slot in these FIFOs is a container, containing one
- * single packet. The number of containers, defining the queue depth, is a software defined 
- * parameter. The data transfer unit between is a container (one single packet).
- *
- * - The "container" structure contains a 2040 bytes data buffer, the packet length, and
- *   the container state : full (owned by the reader) / empty (owned by the writer).
+ * single packet. The number of containers, defining the queue depth, is defined by the 
+ * CONFIG_SOCK_QUEUES_DEPTH. The data transfer unit is one container (one single packet).
+ *
+ * - One container contains a 2040 bytes data buffer, the packet length (4bytes), and the
+ *   container state (4 bytes) : full (owned by the reader) / empty (owned by the writer).
  *   For each container, the state variable is used as a SET/RESET flip-flop to synchronize 
  *   the software server thread, and the hardware NIC DMA engines. 
@@ -126 +127 @@
 
 /********************************************************************************************
- * This structure defines the chbuf descriptor, used to implement both the RX and TX packets
+ * This structure defines the soclib_nic chbuf descriptor, used to implement the RX and TX 
  * queues. Each container contains one single packet, and has only two states (full/empty).
  * All containers are allocated in the same cluster as the associated NIC chdev descriptor.
@@ -136 +137 @@
  *******************************************************************************************/
 
-#define SOCLIB_NIC_CHBUF_DEPTH   8
-
 typedef struct nic_chbuf_s
 {
-    uint32_t   wid;                              /*! current container write index         */
-    uint32_t   rid;                              /*! current container read index          */
-    uint64_t   cont_pad[SOCLIB_NIC_CHBUF_DEPTH]; /*! containers physical base addresses    */
-    uint32_t * cont_ptr[SOCLIB_NIC_CHBUF_DEPTH]; /*! containers virtual base addresses     */
+    uint32_t   wid;                               /*! current container write index        */
+    uint32_t   rid;                               /*! current container read index         */
+    uint64_t   cont_pad[CONFIG_SOCK_QUEUES_DEPTH]; /*! containers physical base addresses   */
+    uint32_t * cont_ptr[CONFIG_SOCK_QUEUES_DEPTH]; /*! containers virtual base addresses    */
 }
 nic_chbuf_t;
 
 /********************************************************************************************
- * This structure defines the container descriptor format.
+ * This structure defines the soclib_nic container descriptor format.
+ * One container occupies exactly 2048 bytes.
  *******************************************************************************************/
 
@@ -212 +212 @@
 
 /********************************************************************************************
- * This ISR is executed when a new RX container has been moved to an empty TX queue,
- * or when a TX container has been removed from a full TX queue. In both cases, it
- * reactivate the corresponding server thread from the BLOCKED_ISR condition.
- * It is also executed in case of error reported by the DMA engines accessing the TX or RX
- * queues. It simply print an error message on the kernel terminal.
- * TODO improve this error handling...
+ * This ISR is executed in four cases :
+ * - when a RX container has been moved to an empty RX queue by the RX DMA engine,
+ * - when a TX container has been removed from a full TX queue by the TX DMA engine,
+ * - when an error is reported by the RX DMA engine accessing the RX queue,
+ * - when an error is reported by the TX DMA engine accessing the TX queue,
+ * In all cases it simply reactivates the corresponding TX or RX server thread,
+ * and signal the event type in writing the relevant value in the command "error" field.
  ********************************************************************************************
  * @ chdev     : local pointer on NIC chdev descriptor.